Anup Patel 5bdecd891e RISC-V: KVM: Use NACL HFENCEs for KVM request based HFENCEs ... When running under some other hypervisor, use SBI NACL based HFENCEs for TLB shoot-down via KVM requests. This makes HFENCEs faster whenever SBI nested acceleration is available. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20241020194734.58686-14-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org>		2024-10-28 16:44:08 +05:30
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aia_aplic.c	RISC-V: KVM: Share APLIC and IMSIC defines with irqchip drivers	2024-06-26 18:37:32 +05:30
aia_device.c	RISC-V: KVM: Share APLIC and IMSIC defines with irqchip drivers	2024-06-26 18:37:32 +05:30
aia_imsic.c	RISCV: KVM: use raw_spinlock for critical section in imsic	2024-10-20 12:10:44 -04:00
aia.c	RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs	2024-10-28 16:44:01 +05:30
Kconfig	riscv: KVM: add basic support for host vs guest profiling	2024-10-28 16:41:14 +05:30
main.c	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
Makefile	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
mmu.c	RISC-V: KVM: Use nacl_csr_xyz() for accessing H-extension CSRs	2024-10-28 16:43:59 +05:30
nacl.c	RISC-V: KVM: Add common nested acceleration support	2024-10-28 16:43:57 +05:30
tlb.c	RISC-V: KVM: Use NACL HFENCEs for KVM request based HFENCEs	2024-10-28 16:44:08 +05:30
trace.h	RISCV: KVM: add tracepoints for entry and exit events	2024-06-26 18:37:36 +05:30
vcpu_exit.c	RISC-V: KVM: Redirect AMO load/store access fault traps to guest	2024-06-26 18:37:41 +05:30
vcpu_fp.c	riscv: Rearrange hwcap.h and cpufeature.h	2023-11-09 10:15:51 -08:00
vcpu_insn.c	KVM: riscv: Support guest wrs.nto	2024-07-12 08:54:51 -07:00
vcpu_onereg.c	RISC-V Patches for the 6.11 Merge Window, Part 1	2024-07-20 09:11:27 -07:00
vcpu_pmu.c	RISC-V: KVM: Don't zero-out PMU snapshot area before freeing data	2024-08-19 08:58:17 +05:30
vcpu_sbi_base.c	RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions	2023-04-21 17:38:44 +05:30
vcpu_sbi_hsm.c	RISCV: KVM: Introduce vcpu->reset_cntx_lock	2024-04-22 10:39:03 +05:30
vcpu_sbi_pmu.c	RISC-V: KVM: Improve firmware counter read function	2024-04-26 13:13:54 +05:30
vcpu_sbi_replace.c	RISC-V: KVM: Make SBI uapi consistent with ISA uapi	2023-12-29 12:31:44 +05:30
vcpu_sbi_sta.c	RISC-V: KVM: Rename the SBI_STA_SHMEM_DISABLE to a generic name	2024-04-22 11:13:52 +05:30
vcpu_sbi_v01.c	RISC-V: KVM: Modify SBI extension handler to return SBI error code	2023-02-07 20:35:45 +05:30
vcpu_sbi.c	RISC-V: KVM: Fix sbiret init before forwarding to userspace	2024-08-19 08:32:10 +05:30
vcpu_switch.S	RISC-V: KVM: Use SBI sync SRET call when available	2024-10-28 16:44:03 +05:30
vcpu_timer.c	RISC-V: KVM: Use nacl_csr_xyz() for accessing H-extension CSRs	2024-10-28 16:43:59 +05:30
vcpu_vector.c	RISC-V: KVM: add 'vlenb' Vector CSR	2023-12-29 12:31:54 +05:30
vcpu.c	RISC-V: KVM: Save trap CSRs in kvm_riscv_vcpu_enter_exit()	2024-10-28 16:44:05 +05:30
vm.c	RISC-V: KVM: Implement kvm_arch_vcpu_ioctl_set_guest_debug()	2024-04-08 14:06:27 +05:30
vmid.c	RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines	2023-04-21 17:45:44 +05:30