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e77e9187ae
Manually convert the two PA-RISC documents to ReST, adding them to the Linux documentation body. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
47 lines
1.7 KiB
ReStructuredText
47 lines
1.7 KiB
ReStructuredText
=================
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PA-RISC Debugging
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=================
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okay, here are some hints for debugging the lower-level parts of
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linux/parisc.
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1. Absolute addresses
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=====================
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A lot of the assembly code currently runs in real mode, which means
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absolute addresses are used instead of virtual addresses as in the
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rest of the kernel. To translate an absolute address to a virtual
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address you can lookup in System.map, add __PAGE_OFFSET (0x10000000
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currently).
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2. HPMCs
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========
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When real-mode code tries to access non-existent memory, you'll get
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an HPMC instead of a kernel oops. To debug an HPMC, try to find
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the System Responder/Requestor addresses. The System Requestor
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address should match (one of the) processor HPAs (high addresses in
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the I/O range); the System Responder address is the address real-mode
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code tried to access.
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Typical values for the System Responder address are addresses larger
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than __PAGE_OFFSET (0x10000000) which mean a virtual address didn't
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get translated to a physical address before real-mode code tried to
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access it.
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3. Q bit fun
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============
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Certain, very critical code has to clear the Q bit in the PSW. What
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happens when the Q bit is cleared is the CPU does not update the
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registers interruption handlers read to find out where the machine
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was interrupted - so if you get an interruption between the instruction
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that clears the Q bit and the RFI that sets it again you don't know
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where exactly it happened. If you're lucky the IAOQ will point to the
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instruction that cleared the Q bit, if you're not it points anywhere
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at all. Usually Q bit problems will show themselves in unexplainable
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system hangs or running off the end of physical memory.
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