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745373e3d6
The A80 is a big.LITTLE SoC with 1 cluster of 4 Cortex-A7s and 1 cluster of 4 Cortex-A15s. This patch adds support to bring up the second cluster and thus all cores using custom platform SMP code. Core/cluster power down has not been implemented, thus CPU hotplugging is not supported. Parts of the trampoline and re-entry code for the boot cpu was adapted from the MCPM framework. Signed-off-by: Chen-Yu Tsai <wens@csie.org>
59 lines
1.1 KiB
Plaintext
59 lines
1.1 KiB
Plaintext
menuconfig ARCH_SUNXI
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bool "Allwinner SoCs"
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depends on ARCH_MULTI_V7
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select ARCH_HAS_RESET_CONTROLLER
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select CLKSRC_MMIO
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select GENERIC_IRQ_CHIP
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select GPIOLIB
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select PINCTRL
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select PM_OPP
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select SUN4I_TIMER
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select RESET_CONTROLLER
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if ARCH_SUNXI
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config MACH_SUN4I
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bool "Allwinner A10 (sun4i) SoCs support"
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default ARCH_SUNXI
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config MACH_SUN5I
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bool "Allwinner A10s / A13 (sun5i) SoCs support"
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default ARCH_SUNXI
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select SUN5I_HSTIMER
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config MACH_SUN6I
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bool "Allwinner A31 (sun6i) SoCs support"
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default ARCH_SUNXI
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select ARM_GIC
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select MFD_SUN6I_PRCM
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select SUN5I_HSTIMER
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config MACH_SUN7I
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bool "Allwinner A20 (sun7i) SoCs support"
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default ARCH_SUNXI
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select ARM_GIC
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select ARM_PSCI
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select ARCH_SUPPORTS_BIG_ENDIAN
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select HAVE_ARM_ARCH_TIMER
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select SUN5I_HSTIMER
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config MACH_SUN8I
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bool "Allwinner sun8i Family SoCs support"
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default ARCH_SUNXI
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select ARM_GIC
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select MFD_SUN6I_PRCM
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config MACH_SUN9I
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bool "Allwinner (sun9i) SoCs support"
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default ARCH_SUNXI
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select ARM_GIC
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config ARCH_SUNXI_MC_SMP
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bool
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depends on SMP
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default MACH_SUN9I
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select ARM_CCI400_PORT_CTRL
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select ARM_CPU_SUSPEND
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endif
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