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229e368239
Now that the SPDX tag is in all USB files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Cc: Raviteja Garimella <raviteja.garimella@broadcom.com> Cc: Romain Perier <romain.perier@collabora.com> Cc: Johan Hovold <johan@kernel.org> Cc: Al Cooper <alcooperx@gmail.com> Cc: Srinath Mannam <srinath.mannam@broadcom.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Krzysztof Opasiak <k.opasiak@samsung.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: "Felix Hädicke" <felixhaedicke@web.de> Cc: Peter Chen <peter.chen@nxp.com> Cc: Allen Pais <allen.lkml@gmail.com> Cc: Yuyang Du <yuyang.du@intel.com> Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
122 lines
3.0 KiB
C
122 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2009
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* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
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*
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* Description:
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* Helper routines for i.MX3x SoCs from Freescale, needed by the fsl_usb2_udc.c
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* driver to function correctly on these systems.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fsl_devices.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include "fsl_usb2_udc.h"
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static struct clk *mxc_ahb_clk;
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static struct clk *mxc_per_clk;
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static struct clk *mxc_ipg_clk;
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/* workaround ENGcm09152 for i.MX35 */
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#define MX35_USBPHYCTRL_OFFSET 0x600
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#define USBPHYCTRL_OTGBASE_OFFSET 0x8
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#define USBPHYCTRL_EVDO (1 << 23)
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int fsl_udc_clk_init(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata;
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unsigned long freq;
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int ret;
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pdata = dev_get_platdata(&pdev->dev);
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mxc_ipg_clk = devm_clk_get(&pdev->dev, "ipg");
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if (IS_ERR(mxc_ipg_clk)) {
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dev_err(&pdev->dev, "clk_get(\"ipg\") failed\n");
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return PTR_ERR(mxc_ipg_clk);
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}
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mxc_ahb_clk = devm_clk_get(&pdev->dev, "ahb");
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if (IS_ERR(mxc_ahb_clk)) {
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dev_err(&pdev->dev, "clk_get(\"ahb\") failed\n");
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return PTR_ERR(mxc_ahb_clk);
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}
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mxc_per_clk = devm_clk_get(&pdev->dev, "per");
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if (IS_ERR(mxc_per_clk)) {
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dev_err(&pdev->dev, "clk_get(\"per\") failed\n");
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return PTR_ERR(mxc_per_clk);
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}
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clk_prepare_enable(mxc_ipg_clk);
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clk_prepare_enable(mxc_ahb_clk);
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clk_prepare_enable(mxc_per_clk);
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/* make sure USB_CLK is running at 60 MHz +/- 1000 Hz */
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if (!strcmp(pdev->id_entry->name, "imx-udc-mx27")) {
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freq = clk_get_rate(mxc_per_clk);
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if (pdata->phy_mode != FSL_USB2_PHY_ULPI &&
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(freq < 59999000 || freq > 60001000)) {
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dev_err(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
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ret = -EINVAL;
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goto eclkrate;
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}
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}
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return 0;
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eclkrate:
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clk_disable_unprepare(mxc_ipg_clk);
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clk_disable_unprepare(mxc_ahb_clk);
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clk_disable_unprepare(mxc_per_clk);
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mxc_per_clk = NULL;
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return ret;
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}
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int fsl_udc_clk_finalize(struct platform_device *pdev)
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{
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struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
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int ret = 0;
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/* workaround ENGcm09152 for i.MX35 */
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if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
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unsigned int v;
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struct resource *res = platform_get_resource
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(pdev, IORESOURCE_MEM, 0);
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void __iomem *phy_regs = ioremap(res->start +
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MX35_USBPHYCTRL_OFFSET, 512);
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if (!phy_regs) {
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dev_err(&pdev->dev, "ioremap for phy address fails\n");
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ret = -EINVAL;
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goto ioremap_err;
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}
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v = readl(phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
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writel(v | USBPHYCTRL_EVDO,
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phy_regs + USBPHYCTRL_OTGBASE_OFFSET);
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iounmap(phy_regs);
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}
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ioremap_err:
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/* ULPI transceivers don't need usbpll */
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if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
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clk_disable_unprepare(mxc_per_clk);
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mxc_per_clk = NULL;
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}
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return ret;
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}
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void fsl_udc_clk_release(void)
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{
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if (mxc_per_clk)
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clk_disable_unprepare(mxc_per_clk);
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clk_disable_unprepare(mxc_ahb_clk);
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clk_disable_unprepare(mxc_ipg_clk);
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}
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