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Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer, industrial, and automotive applications. This switch integrates OTP and EEPROM to enable customization of the part in the field. This patch adds support to read and write into PCI1XXXX OTP via NVMEM sysfs. Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Co-developed-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Co-developed-by: Vaibhaav Ram T.L <vaibhaavram.tl@microchip.com> Signed-off-by: Vaibhaav Ram T.L <vaibhaavram.tl@microchip.com> Link: https://lore.kernel.org/r/20230620143520.858-2-vaibhaavram.tl@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2 lines
92 B
Makefile
2 lines
92 B
Makefile
obj-$(CONFIG_GP_PCI1XXXX) := mchp_pci1xxxx_gp.o mchp_pci1xxxx_gpio.o mchp_pci1xxxx_otpe2p.o
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