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d7d1d45cc4
This patch splits the sama5d3 SoCs definition: - a common base for all sama5d3 SoCs (sama5d3.dtsi) - several optional peripheral definitions which will be included by sama5d3 specific SoCs (sama5d3_'periph name'.dtsi) - sama5d3 specific SoC definitions (sama5d3x.dtsi) This provides a better representation of the real hardware (drop unneed dt nodes) and avoids peripheral id conflict (which is not the case for current sama5d3 SoCs, but could be if other SoCs of this family are released). Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> [nicolas.ferre@atmel.com: add more "sama5d3?" compatibility strings] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
54 lines
1.4 KiB
Plaintext
54 lines
1.4 KiB
Plaintext
/*
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* at91sama5d3_uart.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
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* UART support
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*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*
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* Licensed under GPLv2.
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*/
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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ahb {
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apb {
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pinctrl@fffff200 {
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
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AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
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AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
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};
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};
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};
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uart0: serial@f0024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf0024000 0x200>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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status = "disabled";
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};
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uart1: serial@f8028000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8028000 0x200>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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};
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};
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};
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