linux/arch/riscv
Alexandre Ghiti 59a27e1122
riscv: Optimize kernel virtual address conversion macro
The current test in kernel_mapping_va_to_pa only applies when
CONFIG_XIP_KERNEL is set, so use IS_ENABLED to optimize this macro at
compile-time in standard kernels that do not require this test.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Tested-by: Emil Renner Berthing <kernel@esmil.dk>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-By: Vitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-08-11 18:37:48 -07:00
..
boot riscv: dts: fu740: fix cache-controller interrupts 2021-06-19 00:11:53 -07:00
configs RISC-V: Enable Microchip PolarFire ICICLE SoC 2021-04-26 08:31:32 -07:00
errata riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled 2021-06-01 21:16:41 -07:00
include riscv: Optimize kernel virtual address conversion macro 2021-08-11 18:37:48 -07:00
kernel riscv: kprobes: implement the branch instructions 2021-07-21 23:22:34 -07:00
lib riscv: __asm_copy_to-from_user: Optimize unaligned memory access and pipeline stall 2021-07-06 15:09:48 -07:00
mm RISC-V Patches for the 5.14 Merge Window, Part 1 2021-07-09 10:36:29 -07:00
net riscv: bpf: Avoid breaking W^X 2021-04-26 08:25:14 -07:00
Kbuild riscv: Allow device trees to be built into the kernel 2020-05-18 11:38:05 -07:00
Kconfig riscv: Enable GENERIC_IRQ_SHOW_LEVEL 2021-08-04 08:49:58 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.erratas riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y 2021-05-06 09:40:13 -07:00
Kconfig.socs riscv: sifive: fix Kconfig errata warning 2021-06-12 17:20:50 -07:00
Makefile Kbuild updates for v5.14 2021-07-10 11:01:38 -07:00