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8bb0daffb0
Now that the omapdss interface has been reworked so that omapdrm can use dispc directly, we have been able to fix the remaining functional kms issues with omapdrm. And in the mean time the PM sequencing and many other of that open issues have been solved. So I think it makes sense to finally move omapdrm out of staging. Signed-off-by: Rob Clark <robdclark@gmail.com>
323 lines
7.8 KiB
C
323 lines
7.8 KiB
C
/*
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* drivers/gpu/drm/omapdrm/omap_irq.c
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*
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* Copyright (C) 2012 Texas Instruments
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* Author: Rob Clark <rob.clark@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "omap_drv.h"
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static DEFINE_SPINLOCK(list_lock);
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static void omap_irq_error_handler(struct omap_drm_irq *irq,
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uint32_t irqstatus)
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{
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DRM_ERROR("errors: %08x\n", irqstatus);
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}
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/* call with list_lock and dispc runtime held */
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static void omap_irq_update(struct drm_device *dev)
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{
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struct omap_drm_private *priv = dev->dev_private;
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struct omap_drm_irq *irq;
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uint32_t irqmask = priv->vblank_mask;
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BUG_ON(!spin_is_locked(&list_lock));
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list_for_each_entry(irq, &priv->irq_list, node)
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irqmask |= irq->irqmask;
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DBG("irqmask=%08x", irqmask);
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dispc_write_irqenable(irqmask);
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dispc_read_irqenable(); /* flush posted write */
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}
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void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq)
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{
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struct omap_drm_private *priv = dev->dev_private;
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unsigned long flags;
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dispc_runtime_get();
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spin_lock_irqsave(&list_lock, flags);
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if (!WARN_ON(irq->registered)) {
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irq->registered = true;
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list_add(&irq->node, &priv->irq_list);
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omap_irq_update(dev);
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}
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spin_unlock_irqrestore(&list_lock, flags);
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dispc_runtime_put();
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}
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void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq)
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{
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unsigned long flags;
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dispc_runtime_get();
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spin_lock_irqsave(&list_lock, flags);
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if (!WARN_ON(!irq->registered)) {
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irq->registered = false;
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list_del(&irq->node);
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omap_irq_update(dev);
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}
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spin_unlock_irqrestore(&list_lock, flags);
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dispc_runtime_put();
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}
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struct omap_irq_wait {
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struct omap_drm_irq irq;
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int count;
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};
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static DECLARE_WAIT_QUEUE_HEAD(wait_event);
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static void wait_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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{
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struct omap_irq_wait *wait =
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container_of(irq, struct omap_irq_wait, irq);
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wait->count--;
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wake_up_all(&wait_event);
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}
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struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
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uint32_t irqmask, int count)
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{
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struct omap_irq_wait *wait = kzalloc(sizeof(*wait), GFP_KERNEL);
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wait->irq.irq = wait_irq;
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wait->irq.irqmask = irqmask;
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wait->count = count;
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omap_irq_register(dev, &wait->irq);
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return wait;
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}
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int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
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unsigned long timeout)
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{
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int ret = wait_event_timeout(wait_event, (wait->count <= 0), timeout);
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omap_irq_unregister(dev, &wait->irq);
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kfree(wait);
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if (ret == 0)
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return -1;
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return 0;
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}
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/**
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* enable_vblank - enable vblank interrupt events
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* @dev: DRM device
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* @crtc: which irq to enable
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*
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* Enable vblank interrupts for @crtc. If the device doesn't have
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* a hardware vblank counter, this routine should be a no-op, since
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* interrupts will have to stay on to keep the count accurate.
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*
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* RETURNS
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* Zero on success, appropriate errno if the given @crtc's vblank
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* interrupt cannot be enabled.
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*/
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int omap_irq_enable_vblank(struct drm_device *dev, int crtc)
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{
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struct omap_drm_private *priv = dev->dev_private;
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unsigned long flags;
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DBG("dev=%p, crtc=%d", dev, crtc);
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dispc_runtime_get();
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spin_lock_irqsave(&list_lock, flags);
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priv->vblank_mask |= pipe2vbl(crtc);
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omap_irq_update(dev);
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spin_unlock_irqrestore(&list_lock, flags);
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dispc_runtime_put();
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return 0;
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}
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/**
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* disable_vblank - disable vblank interrupt events
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* @dev: DRM device
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* @crtc: which irq to enable
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*
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* Disable vblank interrupts for @crtc. If the device doesn't have
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* a hardware vblank counter, this routine should be a no-op, since
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* interrupts will have to stay on to keep the count accurate.
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*/
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void omap_irq_disable_vblank(struct drm_device *dev, int crtc)
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{
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struct omap_drm_private *priv = dev->dev_private;
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unsigned long flags;
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DBG("dev=%p, crtc=%d", dev, crtc);
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dispc_runtime_get();
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spin_lock_irqsave(&list_lock, flags);
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priv->vblank_mask &= ~pipe2vbl(crtc);
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omap_irq_update(dev);
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spin_unlock_irqrestore(&list_lock, flags);
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dispc_runtime_put();
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}
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irqreturn_t omap_irq_handler(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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struct omap_drm_private *priv = dev->dev_private;
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struct omap_drm_irq *handler, *n;
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unsigned long flags;
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unsigned int id;
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u32 irqstatus;
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irqstatus = dispc_read_irqstatus();
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dispc_clear_irqstatus(irqstatus);
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dispc_read_irqstatus(); /* flush posted write */
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VERB("irqs: %08x", irqstatus);
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for (id = 0; id < priv->num_crtcs; id++)
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if (irqstatus & pipe2vbl(id))
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drm_handle_vblank(dev, id);
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spin_lock_irqsave(&list_lock, flags);
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list_for_each_entry_safe(handler, n, &priv->irq_list, node) {
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if (handler->irqmask & irqstatus) {
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spin_unlock_irqrestore(&list_lock, flags);
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handler->irq(handler, handler->irqmask & irqstatus);
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spin_lock_irqsave(&list_lock, flags);
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}
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}
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spin_unlock_irqrestore(&list_lock, flags);
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return IRQ_HANDLED;
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}
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void omap_irq_preinstall(struct drm_device *dev)
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{
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DBG("dev=%p", dev);
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dispc_runtime_get();
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dispc_clear_irqstatus(0xffffffff);
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dispc_runtime_put();
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}
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int omap_irq_postinstall(struct drm_device *dev)
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{
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struct omap_drm_private *priv = dev->dev_private;
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struct omap_drm_irq *error_handler = &priv->error_handler;
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DBG("dev=%p", dev);
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INIT_LIST_HEAD(&priv->irq_list);
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error_handler->irq = omap_irq_error_handler;
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error_handler->irqmask = DISPC_IRQ_OCP_ERR;
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/* for now ignore DISPC_IRQ_SYNC_LOST_DIGIT.. really I think
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* we just need to ignore it while enabling tv-out
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*/
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error_handler->irqmask &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
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omap_irq_register(dev, error_handler);
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return 0;
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}
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void omap_irq_uninstall(struct drm_device *dev)
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{
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DBG("dev=%p", dev);
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// TODO prolly need to call drm_irq_uninstall() somewhere too
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}
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/*
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* We need a special version, instead of just using drm_irq_install(),
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* because we need to register the irq via omapdss. Once omapdss and
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* omapdrm are merged together we can assign the dispc hwmod data to
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* ourselves and drop these and just use drm_irq_{install,uninstall}()
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*/
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int omap_drm_irq_install(struct drm_device *dev)
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{
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int ret;
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mutex_lock(&dev->struct_mutex);
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if (dev->irq_enabled) {
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mutex_unlock(&dev->struct_mutex);
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return -EBUSY;
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}
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dev->irq_enabled = 1;
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mutex_unlock(&dev->struct_mutex);
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/* Before installing handler */
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if (dev->driver->irq_preinstall)
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dev->driver->irq_preinstall(dev);
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ret = dispc_request_irq(dev->driver->irq_handler, dev);
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if (ret < 0) {
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mutex_lock(&dev->struct_mutex);
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dev->irq_enabled = 0;
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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/* After installing handler */
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if (dev->driver->irq_postinstall)
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ret = dev->driver->irq_postinstall(dev);
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if (ret < 0) {
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mutex_lock(&dev->struct_mutex);
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dev->irq_enabled = 0;
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mutex_unlock(&dev->struct_mutex);
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dispc_free_irq(dev);
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}
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return ret;
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}
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int omap_drm_irq_uninstall(struct drm_device *dev)
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{
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unsigned long irqflags;
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int irq_enabled, i;
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mutex_lock(&dev->struct_mutex);
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irq_enabled = dev->irq_enabled;
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dev->irq_enabled = 0;
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mutex_unlock(&dev->struct_mutex);
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/*
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* Wake up any waiters so they don't hang.
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*/
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if (dev->num_crtcs) {
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spin_lock_irqsave(&dev->vbl_lock, irqflags);
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for (i = 0; i < dev->num_crtcs; i++) {
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DRM_WAKEUP(&dev->vbl_queue[i]);
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dev->vblank_enabled[i] = 0;
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dev->last_vblank[i] =
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dev->driver->get_vblank_counter(dev, i);
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}
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spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
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}
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if (!irq_enabled)
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return -EINVAL;
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if (dev->driver->irq_uninstall)
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dev->driver->irq_uninstall(dev);
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dispc_free_irq(dev);
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return 0;
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}
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