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Update license to use SPDX-License-Identifier instead of verbose license text. Link: http://lkml.kernel.org/r/871s6wcswb.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
415 lines
7.1 KiB
ArmAsm
415 lines
7.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+
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*
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* $Id: checksum.S,v 1.10 2001/07/06 13:11:32 gniibe Exp $
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*
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* INET An implementation of the TCP/IP protocol suite for the LINUX
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* operating system. INET is implemented using the BSD Socket
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* interface as the means of communication with the user level.
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*
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* IP/TCP/UDP checksumming routines
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*
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* Authors: Jorge Cwik, <jorge@laser.satlink.net>
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* Arnt Gulbrandsen, <agulbra@nvg.unit.no>
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* Tom May, <ftom@netcom.com>
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* Pentium Pro/II routines:
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* Alexander Kjeldaas <astor@guardian.no>
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* Finn Arne Gangstad <finnag@guardian.no>
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* Lots of code moved from tcp.c and ip.c; see those files
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* for more names.
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*
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* Changes: Ingo Molnar, converted csum_partial_copy() to 2.1 exception
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* handling.
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* Andi Kleen, add zeroing on error
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* converted to pure assembler
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*
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* SuperH version: Copyright (C) 1999 Niibe Yutaka
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*/
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#include <asm/errno.h>
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#include <linux/linkage.h>
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/*
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* computes a partial checksum, e.g. for TCP/UDP fragments
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*/
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/*
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* asmlinkage __wsum csum_partial(const void *buf, int len, __wsum sum);
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*/
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.text
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ENTRY(csum_partial)
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/*
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* Experiments with Ethernet and SLIP connections show that buff
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* is aligned on either a 2-byte or 4-byte boundary. We get at
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* least a twofold speedup on 486 and Pentium if it is 4-byte aligned.
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* Fortunately, it is easy to convert 2-byte alignment to 4-byte
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* alignment for the unrolled loop.
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*/
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mov r4, r0
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tst #3, r0 ! Check alignment.
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bt/s 2f ! Jump if alignment is ok.
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mov r4, r7 ! Keep a copy to check for alignment
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!
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tst #1, r0 ! Check alignment.
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bt 21f ! Jump if alignment is boundary of 2bytes.
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! buf is odd
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tst r5, r5
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add #-1, r5
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bt 9f
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mov.b @r4+, r0
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extu.b r0, r0
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addc r0, r6 ! t=0 from previous tst
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mov r6, r0
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shll8 r6
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shlr16 r0
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shlr8 r0
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or r0, r6
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mov r4, r0
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tst #2, r0
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bt 2f
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21:
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! buf is 2 byte aligned (len could be 0)
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add #-2, r5 ! Alignment uses up two bytes.
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cmp/pz r5 !
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bt/s 1f ! Jump if we had at least two bytes.
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clrt
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bra 6f
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add #2, r5 ! r5 was < 2. Deal with it.
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1:
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mov.w @r4+, r0
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extu.w r0, r0
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addc r0, r6
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bf 2f
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add #1, r6
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2:
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! buf is 4 byte aligned (len could be 0)
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mov r5, r1
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mov #-5, r0
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shld r0, r1
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tst r1, r1
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bt/s 4f ! if it's =0, go to 4f
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clrt
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.align 2
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3:
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mov.l @r4+, r0
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mov.l @r4+, r2
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mov.l @r4+, r3
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addc r0, r6
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mov.l @r4+, r0
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addc r2, r6
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mov.l @r4+, r2
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addc r3, r6
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mov.l @r4+, r3
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addc r0, r6
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mov.l @r4+, r0
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addc r2, r6
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mov.l @r4+, r2
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addc r3, r6
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addc r0, r6
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addc r2, r6
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movt r0
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dt r1
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bf/s 3b
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cmp/eq #1, r0
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! here, we know r1==0
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addc r1, r6 ! add carry to r6
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4:
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mov r5, r0
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and #0x1c, r0
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tst r0, r0
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bt 6f
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! 4 bytes or more remaining
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mov r0, r1
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shlr2 r1
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mov #0, r2
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5:
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addc r2, r6
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mov.l @r4+, r2
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movt r0
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dt r1
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bf/s 5b
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cmp/eq #1, r0
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addc r2, r6
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addc r1, r6 ! r1==0 here, so it means add carry-bit
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6:
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! 3 bytes or less remaining
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mov #3, r0
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and r0, r5
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tst r5, r5
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bt 9f ! if it's =0 go to 9f
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mov #2, r1
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cmp/hs r1, r5
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bf 7f
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mov.w @r4+, r0
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extu.w r0, r0
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cmp/eq r1, r5
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bt/s 8f
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clrt
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shll16 r0
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addc r0, r6
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7:
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mov.b @r4+, r0
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extu.b r0, r0
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#ifndef __LITTLE_ENDIAN__
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shll8 r0
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#endif
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8:
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addc r0, r6
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mov #0, r0
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addc r0, r6
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9:
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! Check if the buffer was misaligned, if so realign sum
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mov r7, r0
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tst #1, r0
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bt 10f
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mov r6, r0
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shll8 r6
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shlr16 r0
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shlr8 r0
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or r0, r6
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10:
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rts
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mov r6, r0
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/*
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unsigned int csum_partial_copy_generic (const char *src, char *dst, int len,
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int sum, int *src_err_ptr, int *dst_err_ptr)
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*/
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/*
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* Copy from ds while checksumming, otherwise like csum_partial
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*
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* The macros SRC and DST specify the type of access for the instruction.
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* thus we can call a custom exception handler for all access types.
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*
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* FIXME: could someone double-check whether I haven't mixed up some SRC and
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* DST definitions? It's damn hard to trigger all cases. I hope I got
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* them all but there's no guarantee.
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*/
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#define SRC(...) \
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9999: __VA_ARGS__ ; \
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.section __ex_table, "a"; \
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.long 9999b, 6001f ; \
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.previous
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#define DST(...) \
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9999: __VA_ARGS__ ; \
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.section __ex_table, "a"; \
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.long 9999b, 6002f ; \
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.previous
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!
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! r4: const char *SRC
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! r5: char *DST
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! r6: int LEN
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! r7: int SUM
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!
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! on stack:
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! int *SRC_ERR_PTR
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! int *DST_ERR_PTR
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!
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ENTRY(csum_partial_copy_generic)
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mov.l r5,@-r15
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mov.l r6,@-r15
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mov #3,r0 ! Check src and dest are equally aligned
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mov r4,r1
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and r0,r1
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and r5,r0
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cmp/eq r1,r0
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bf 3f ! Different alignments, use slow version
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tst #1,r0 ! Check dest word aligned
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bf 3f ! If not, do it the slow way
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mov #2,r0
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tst r0,r5 ! Check dest alignment.
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bt 2f ! Jump if alignment is ok.
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add #-2,r6 ! Alignment uses up two bytes.
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cmp/pz r6 ! Jump if we had at least two bytes.
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bt/s 1f
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clrt
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add #2,r6 ! r6 was < 2. Deal with it.
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bra 4f
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mov r6,r2
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3: ! Handle different src and dest alignments.
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! This is not common, so simple byte by byte copy will do.
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mov r6,r2
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shlr r6
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tst r6,r6
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bt 4f
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clrt
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.align 2
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5:
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SRC( mov.b @r4+,r1 )
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SRC( mov.b @r4+,r0 )
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extu.b r1,r1
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DST( mov.b r1,@r5 )
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DST( mov.b r0,@(1,r5) )
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extu.b r0,r0
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add #2,r5
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#ifdef __LITTLE_ENDIAN__
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shll8 r0
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#else
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shll8 r1
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#endif
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or r1,r0
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addc r0,r7
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movt r0
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dt r6
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bf/s 5b
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cmp/eq #1,r0
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mov #0,r0
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addc r0, r7
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mov r2, r0
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tst #1, r0
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bt 7f
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bra 5f
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clrt
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! src and dest equally aligned, but to a two byte boundary.
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! Handle first two bytes as a special case
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.align 2
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1:
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SRC( mov.w @r4+,r0 )
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DST( mov.w r0,@r5 )
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add #2,r5
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extu.w r0,r0
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addc r0,r7
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mov #0,r0
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addc r0,r7
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2:
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mov r6,r2
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mov #-5,r0
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shld r0,r6
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tst r6,r6
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bt/s 2f
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clrt
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.align 2
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1:
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SRC( mov.l @r4+,r0 )
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SRC( mov.l @r4+,r1 )
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addc r0,r7
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DST( mov.l r0,@r5 )
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DST( mov.l r1,@(4,r5) )
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addc r1,r7
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SRC( mov.l @r4+,r0 )
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SRC( mov.l @r4+,r1 )
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addc r0,r7
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DST( mov.l r0,@(8,r5) )
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DST( mov.l r1,@(12,r5) )
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addc r1,r7
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SRC( mov.l @r4+,r0 )
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SRC( mov.l @r4+,r1 )
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addc r0,r7
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DST( mov.l r0,@(16,r5) )
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DST( mov.l r1,@(20,r5) )
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addc r1,r7
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SRC( mov.l @r4+,r0 )
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SRC( mov.l @r4+,r1 )
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addc r0,r7
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DST( mov.l r0,@(24,r5) )
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DST( mov.l r1,@(28,r5) )
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addc r1,r7
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add #32,r5
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movt r0
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dt r6
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bf/s 1b
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cmp/eq #1,r0
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mov #0,r0
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addc r0,r7
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2: mov r2,r6
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mov #0x1c,r0
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and r0,r6
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cmp/pl r6
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bf/s 4f
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clrt
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shlr2 r6
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3:
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SRC( mov.l @r4+,r0 )
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addc r0,r7
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DST( mov.l r0,@r5 )
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add #4,r5
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movt r0
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dt r6
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bf/s 3b
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cmp/eq #1,r0
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mov #0,r0
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addc r0,r7
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4: mov r2,r6
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mov #3,r0
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and r0,r6
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cmp/pl r6
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bf 7f
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mov #2,r1
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cmp/hs r1,r6
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bf 5f
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SRC( mov.w @r4+,r0 )
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DST( mov.w r0,@r5 )
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extu.w r0,r0
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add #2,r5
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cmp/eq r1,r6
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bt/s 6f
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clrt
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shll16 r0
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addc r0,r7
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5:
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SRC( mov.b @r4+,r0 )
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DST( mov.b r0,@r5 )
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extu.b r0,r0
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#ifndef __LITTLE_ENDIAN__
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shll8 r0
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#endif
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6: addc r0,r7
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mov #0,r0
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addc r0,r7
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7:
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5000:
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# Exception handler:
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.section .fixup, "ax"
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6001:
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mov.l @(8,r15),r0 ! src_err_ptr
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mov #-EFAULT,r1
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mov.l r1,@r0
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! zero the complete destination - computing the rest
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! is too much work
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mov.l @(4,r15),r5 ! dst
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mov.l @r15,r6 ! len
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mov #0,r7
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1: mov.b r7,@r5
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dt r6
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bf/s 1b
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add #1,r5
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mov.l 8000f,r0
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jmp @r0
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nop
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.align 2
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8000: .long 5000b
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6002:
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mov.l @(12,r15),r0 ! dst_err_ptr
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mov #-EFAULT,r1
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mov.l r1,@r0
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mov.l 8001f,r0
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jmp @r0
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nop
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.align 2
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8001: .long 5000b
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.previous
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add #8,r15
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rts
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mov r7,r0
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