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This is the new Armada XP evaluation board from Marvell. It comes with a RS232 port over USB, a SATA link, an internal SSD, 4 Ethernet Gigabit links. Support for USB (Host and device), SDIO, PCIe will be added as drivers when they become available for Armada XP in mainline. Tested-by: Simon Guinot <simon.guinot@sequanux.org> Tested-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
102 lines
2.0 KiB
Plaintext
102 lines
2.0 KiB
Plaintext
/*
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* Device Tree file for Marvell Armada XP development board
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* (DB-MV784MP-GP)
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*
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* Copyright (C) 2013 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/include/ "armada-xp-mv78460.dtsi"
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/ {
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model = "Marvell Armada XP Development Board DB-MV784MP-GP";
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compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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/*
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* 4 GB of plug-in RAM modules by default but only 3GB
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* are visible, the amount of memory available can be
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* changed by the bootloader according the size of the
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* module actually plugged
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*/
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reg = <0x00000000 0xC0000000>;
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};
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soc {
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serial@d0012000 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012100 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012200 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@d0012300 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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sata@d00a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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mdio {
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phy0: ethernet-phy@0 {
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reg = <16>;
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};
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phy1: ethernet-phy@1 {
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reg = <17>;
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};
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phy2: ethernet-phy@2 {
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reg = <18>;
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};
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phy3: ethernet-phy@3 {
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reg = <19>;
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};
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};
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ethernet@d0070000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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ethernet@d0074000 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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ethernet@d0030000 {
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status = "okay";
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phy = <&phy2>;
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phy-mode = "rgmii-id";
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};
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ethernet@d0034000 {
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status = "okay";
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phy = <&phy3>;
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phy-mode = "rgmii-id";
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};
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};
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};
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