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2f61929eb1
The PHY ID is incorrect. It leads to troubles when resuming from standby
or mem power states.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Fixes: af690fa37e ("ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support")
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
103 lines
3.2 KiB
Plaintext
103 lines
3.2 KiB
Plaintext
/*
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* at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
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*
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* Copyright (c) 2017, Microchip Technology Inc.
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* 2017 Cristian Birsan <cristian.birsan@microchip.com>
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* 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "sama5d2.dtsi"
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#include "sama5d2-pinfunc.h"
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/ {
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model = "Atmel SAMA5D27 SoM1";
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compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <24000000>;
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};
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};
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ahb {
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apb {
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macb0: ethernet@f8008000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_default>;
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phy-mode = "rmii";
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ethernet-phy@0 {
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reg = <0x0>;
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interrupt-parent = <&pioA>;
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interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_phy_irq>;
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};
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};
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pinctrl@fc038000 {
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pinctrl_macb0_default: macb0_default {
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pinmux = <PIN_PD9__GTXCK>,
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<PIN_PD10__GTXEN>,
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<PIN_PD11__GRXDV>,
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<PIN_PD12__GRXER>,
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<PIN_PD13__GRX0>,
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<PIN_PD14__GRX1>,
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<PIN_PD15__GTX0>,
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<PIN_PD16__GTX1>,
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<PIN_PD17__GMDC>,
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<PIN_PD18__GMDIO>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PD31__GPIO>;
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bias-disable;
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};
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};
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};
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};
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};
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