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86495af117
In commit9011e49d54("modules: only allow symbol_get of EXPORT_SYMBOL_GPL modules") the use of symbol_get is properly restricted to GPL-only marked symbols. This interacts oddly with the DVB logic which only uses dvb_attach() to load the dvb driver which then uses symbol_get(). Fix this up by properly marking all of the dvb_attach attach symbols as EXPORT_SYMBOL_GPL(). Fixes:9011e49d54("modules: only allow symbol_get of EXPORT_SYMBOL_GPL modules") Cc: stable <stable@kernel.org> Reported-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Christoph Hellwig <hch@lst.de> Cc: linux-media@vger.kernel.org Cc: linux-modules@vger.kernel.org Acked-by: Luis Chamberlain <mcgrof@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Link: https://lore.kernel.org/r/20230908092035.3815268-2-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
344 lines
8.0 KiB
C
344 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* NXP TDA18218HN silicon tuner driver
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*
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* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
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*/
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#include "tda18218_priv.h"
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/* Max transfer size done by I2C transfer functions */
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#define MAX_XFER_SIZE 64
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/* write multiple registers */
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static int tda18218_wr_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
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{
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int ret = 0, len2, remaining;
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u8 buf[MAX_XFER_SIZE];
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struct i2c_msg msg[1] = {
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{
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.addr = priv->cfg->i2c_address,
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.flags = 0,
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.buf = buf,
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}
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};
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if (1 + len > sizeof(buf)) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr reg=%04x: len=%d is too big!\n",
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KBUILD_MODNAME, reg, len);
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return -EINVAL;
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}
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for (remaining = len; remaining > 0;
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remaining -= (priv->cfg->i2c_wr_max - 1)) {
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len2 = remaining;
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if (len2 > (priv->cfg->i2c_wr_max - 1))
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len2 = (priv->cfg->i2c_wr_max - 1);
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msg[0].len = 1 + len2;
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buf[0] = reg + len - remaining;
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memcpy(&buf[1], &val[len - remaining], len2);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret != 1)
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break;
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}
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if (ret == 1) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* read multiple registers */
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static int tda18218_rd_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
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{
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int ret;
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u8 buf[MAX_XFER_SIZE]; /* we must start read always from reg 0x00 */
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struct i2c_msg msg[2] = {
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{
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.addr = priv->cfg->i2c_address,
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.flags = 0,
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.len = 1,
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.buf = "\x00",
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}, {
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.addr = priv->cfg->i2c_address,
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.flags = I2C_M_RD,
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.len = reg + len,
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.buf = buf,
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}
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};
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if (reg + len > sizeof(buf)) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr reg=%04x: len=%d is too big!\n",
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KBUILD_MODNAME, reg, len);
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return -EINVAL;
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}
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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memcpy(val, &buf[reg], len);
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* write single register */
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static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
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{
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return tda18218_wr_regs(priv, reg, &val, 1);
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}
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/* read single register */
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static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
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{
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return tda18218_rd_regs(priv, reg, val, 1);
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}
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static int tda18218_set_params(struct dvb_frontend *fe)
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{
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struct tda18218_priv *priv = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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u32 bw = c->bandwidth_hz;
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int ret;
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u8 buf[3], i, BP_Filter, LP_Fc;
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u32 LO_Frac;
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/* TODO: find out correct AGC algorithm */
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u8 agc[][2] = {
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{ R20_AGC11, 0x60 },
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{ R23_AGC21, 0x02 },
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{ R20_AGC11, 0xa0 },
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{ R23_AGC21, 0x09 },
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{ R20_AGC11, 0xe0 },
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{ R23_AGC21, 0x0c },
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{ R20_AGC11, 0x40 },
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{ R23_AGC21, 0x01 },
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{ R20_AGC11, 0x80 },
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{ R23_AGC21, 0x08 },
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{ R20_AGC11, 0xc0 },
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{ R23_AGC21, 0x0b },
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{ R24_AGC22, 0x1c },
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{ R24_AGC22, 0x0c },
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};
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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/* low-pass filter cut-off frequency */
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if (bw <= 6000000) {
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LP_Fc = 0;
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priv->if_frequency = 3000000;
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} else if (bw <= 7000000) {
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LP_Fc = 1;
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priv->if_frequency = 3500000;
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} else {
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LP_Fc = 2;
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priv->if_frequency = 4000000;
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}
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LO_Frac = c->frequency + priv->if_frequency;
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/* band-pass filter */
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if (LO_Frac < 188000000)
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BP_Filter = 3;
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else if (LO_Frac < 253000000)
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BP_Filter = 4;
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else if (LO_Frac < 343000000)
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BP_Filter = 5;
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else
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BP_Filter = 6;
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buf[0] = (priv->regs[R1A_IF1] & ~7) | BP_Filter; /* BP_Filter */
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buf[1] = (priv->regs[R1B_IF2] & ~3) | LP_Fc; /* LP_Fc */
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buf[2] = priv->regs[R1C_AGC2B];
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ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
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if (ret)
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goto error;
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buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
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buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
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buf[2] = (LO_Frac / 1000) << 4 |
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(priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
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ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
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if (ret)
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goto error;
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buf[0] = priv->regs[R0F_MD8] | (1 << 6); /* Freq_prog_Start */
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ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
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if (ret)
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goto error;
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buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
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ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
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if (ret)
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goto error;
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/* trigger AGC */
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for (i = 0; i < ARRAY_SIZE(agc); i++) {
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ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
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if (ret)
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goto error;
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}
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error:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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if (ret)
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct tda18218_priv *priv = fe->tuner_priv;
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*frequency = priv->if_frequency;
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dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d\n", __func__, *frequency);
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return 0;
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}
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static int tda18218_sleep(struct dvb_frontend *fe)
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{
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struct tda18218_priv *priv = fe->tuner_priv;
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int ret;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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/* standby */
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ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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if (ret)
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int tda18218_init(struct dvb_frontend *fe)
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{
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struct tda18218_priv *priv = fe->tuner_priv;
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int ret;
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/* TODO: calibrations */
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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if (ret)
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static void tda18218_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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}
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static const struct dvb_tuner_ops tda18218_tuner_ops = {
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.info = {
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.name = "NXP TDA18218",
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.frequency_min_hz = 174 * MHz,
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.frequency_max_hz = 864 * MHz,
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.frequency_step_hz = 1 * kHz,
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},
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.release = tda18218_release,
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.init = tda18218_init,
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.sleep = tda18218_sleep,
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.set_params = tda18218_set_params,
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.get_if_frequency = tda18218_get_if_frequency,
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};
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struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
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struct i2c_adapter *i2c, struct tda18218_config *cfg)
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{
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struct tda18218_priv *priv = NULL;
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u8 val;
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int ret;
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/* chip default registers values */
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static u8 def_regs[] = {
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0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
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0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
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0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
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0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
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0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
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0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
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};
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priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
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if (priv == NULL)
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return NULL;
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priv->cfg = cfg;
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priv->i2c = i2c;
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fe->tuner_priv = priv;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
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/* check if the tuner is there */
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ret = tda18218_rd_reg(priv, R00_ID, &val);
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if (!ret)
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dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val);
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if (ret || val != def_regs[R00_ID]) {
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kfree(priv);
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return NULL;
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}
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dev_info(&priv->i2c->dev,
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"%s: NXP TDA18218HN successfully identified\n",
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KBUILD_MODNAME);
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memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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memcpy(priv->regs, def_regs, sizeof(def_regs));
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/* loop-through enabled chip default register values */
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if (priv->cfg->loop_through) {
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priv->regs[R17_PD1] = 0xb0;
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priv->regs[R18_PD2] = 0x59;
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}
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/* standby */
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ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
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if (ret)
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
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return fe;
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}
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EXPORT_SYMBOL_GPL(tda18218_attach);
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MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
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MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
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MODULE_LICENSE("GPL");
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