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A typical SMP system expects cache coherency. Initial NPS platform support was slated to be SMP w/o cache coherency. However it seems the platform now selects that option, so there is no point in keeping it around. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
14 lines
465 B
Plaintext
14 lines
465 B
Plaintext
#
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# Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License version 2 as
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# published by the Free Software Foundation.
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#
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menuconfig ARC_PLAT_SIM
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bool "ARC nSIM based simulation virtual platforms"
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help
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Support for nSIM based ARC simulation platforms
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This includes the standalone nSIM (uart only) vs. System C OSCI VP
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