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percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
734 lines
17 KiB
C
734 lines
17 KiB
C
/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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#include <linux/module.h>
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#include <linux/regset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <asm/sigcontext.h>
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#include <asm/processor.h>
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#include <asm/math_emu.h>
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#include <asm/uaccess.h>
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#include <asm/ptrace.h>
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#include <asm/i387.h>
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#include <asm/user.h>
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#ifdef CONFIG_X86_64
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# include <asm/sigcontext32.h>
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# include <asm/user32.h>
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#else
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# define save_i387_xstate_ia32 save_i387_xstate
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# define restore_i387_xstate_ia32 restore_i387_xstate
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# define _fpstate_ia32 _fpstate
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# define _xstate_ia32 _xstate
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# define sig_xstate_ia32_size sig_xstate_size
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# define fx_sw_reserved_ia32 fx_sw_reserved
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# define user_i387_ia32_struct user_i387_struct
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# define user32_fxsr_struct user_fxsr_struct
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#endif
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#ifdef CONFIG_MATH_EMULATION
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# define HAVE_HWFP (boot_cpu_data.hard_math)
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#else
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# define HAVE_HWFP 1
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#endif
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static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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unsigned int xstate_size;
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unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
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static struct i387_fxsave_struct fx_scratch __cpuinitdata;
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void __cpuinit mxcsr_feature_mask_init(void)
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{
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unsigned long mask = 0;
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clts();
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if (cpu_has_fxsr) {
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memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
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asm volatile("fxsave %0" : : "m" (fx_scratch));
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mask = fx_scratch.mxcsr_mask;
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if (mask == 0)
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mask = 0x0000ffbf;
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}
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mxcsr_feature_mask &= mask;
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stts();
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}
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void __cpuinit init_thread_xstate(void)
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{
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if (!HAVE_HWFP) {
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xstate_size = sizeof(struct i387_soft_struct);
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return;
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}
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if (cpu_has_xsave) {
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xsave_cntxt_init();
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return;
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}
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if (cpu_has_fxsr)
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xstate_size = sizeof(struct i387_fxsave_struct);
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#ifdef CONFIG_X86_32
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else
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xstate_size = sizeof(struct i387_fsave_struct);
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#endif
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}
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#ifdef CONFIG_X86_64
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/*
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* Called at bootup to set up the initial FPU state that is later cloned
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* into all processes.
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*/
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void __cpuinit fpu_init(void)
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{
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unsigned long oldcr0 = read_cr0();
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set_in_cr4(X86_CR4_OSFXSR);
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set_in_cr4(X86_CR4_OSXMMEXCPT);
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write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
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/*
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* Boot processor to setup the FP and extended state context info.
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*/
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if (!smp_processor_id())
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init_thread_xstate();
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xsave_init();
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mxcsr_feature_mask_init();
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/* clean state in init */
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if (cpu_has_xsave)
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current_thread_info()->status = TS_XSAVE;
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else
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current_thread_info()->status = 0;
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clear_used_math();
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}
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#endif /* CONFIG_X86_64 */
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/*
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* The _current_ task is using the FPU for the first time
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* so initialize it and set the mxcsr to its default
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* value at reset if we support XMM instructions and then
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* remeber the current task has used the FPU.
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*/
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int init_fpu(struct task_struct *tsk)
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{
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if (tsk_used_math(tsk)) {
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if (HAVE_HWFP && tsk == current)
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unlazy_fpu(tsk);
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return 0;
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}
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/*
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* Memory allocation at the first usage of the FPU and other state.
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*/
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if (!tsk->thread.xstate) {
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tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
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GFP_KERNEL);
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if (!tsk->thread.xstate)
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return -ENOMEM;
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}
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#ifdef CONFIG_X86_32
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if (!HAVE_HWFP) {
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memset(tsk->thread.xstate, 0, xstate_size);
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finit_task(tsk);
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set_stopped_child_used_math(tsk);
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return 0;
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}
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#endif
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if (cpu_has_fxsr) {
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struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
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memset(fx, 0, xstate_size);
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fx->cwd = 0x37f;
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if (cpu_has_xmm)
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fx->mxcsr = MXCSR_DEFAULT;
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} else {
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struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
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memset(fp, 0, xstate_size);
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fp->cwd = 0xffff037fu;
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fp->swd = 0xffff0000u;
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fp->twd = 0xffffffffu;
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fp->fos = 0xffff0000u;
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}
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/*
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* Only the device not available exception or ptrace can call init_fpu.
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*/
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set_stopped_child_used_math(tsk);
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return 0;
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}
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/*
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* The xstateregs_active() routine is the same as the fpregs_active() routine,
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* as the "regset->n" for the xstate regset will be updated based on the feature
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* capabilites supported by the xsave.
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*/
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return tsk_used_math(target) ? regset->n : 0;
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}
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int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
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}
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int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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if (!cpu_has_fxsr)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->fxsave, 0, -1);
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}
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int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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if (!cpu_has_fxsr)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->fxsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
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/*
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* update the header bits in the xsave header, indicating the
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* presence of FP and SSE state.
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*/
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if (cpu_has_xsave)
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target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
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return ret;
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}
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int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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/*
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* Copy the 48bytes defined by the software first into the xstate
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* memory layout in the thread struct, so that we can copy the entire
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* xstateregs to the user using one user_regset_copyout().
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*/
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memcpy(&target->thread.xstate->fxsave.sw_reserved,
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xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
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/*
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* Copy the xstate memory layout.
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*/
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->xsave, 0, -1);
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return ret;
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}
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int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct xsave_hdr_struct *xsave_hdr;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.xstate->xsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
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xsave_hdr = &target->thread.xstate->xsave.xsave_hdr;
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xsave_hdr->xstate_bv &= pcntxt_mask;
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/*
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* These bits must be zero.
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*/
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xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
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return ret;
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}
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
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* FPU tag word conversions.
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*/
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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
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unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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tmp = ~twd;
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tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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/* and move the valid bits to the lower byte. */
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tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
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tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
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tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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return tmp;
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}
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#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
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#define FP_EXP_TAG_VALID 0
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#define FP_EXP_TAG_ZERO 1
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#define FP_EXP_TAG_SPECIAL 2
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#define FP_EXP_TAG_EMPTY 3
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static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
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{
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struct _fpxreg *st;
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u32 tos = (fxsave->swd >> 11) & 7;
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u32 twd = (unsigned long) fxsave->twd;
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u32 tag;
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u32 ret = 0xffff0000u;
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int i;
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for (i = 0; i < 8; i++, twd >>= 1) {
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if (twd & 0x1) {
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st = FPREG_ADDR(fxsave, (i - tos) & 7);
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switch (st->exponent & 0x7fff) {
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case 0x7fff:
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tag = FP_EXP_TAG_SPECIAL;
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break;
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case 0x0000:
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if (!st->significand[0] &&
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!st->significand[1] &&
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!st->significand[2] &&
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!st->significand[3])
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tag = FP_EXP_TAG_ZERO;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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default:
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if (st->significand[3] & 0x8000)
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tag = FP_EXP_TAG_VALID;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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}
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} else {
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tag = FP_EXP_TAG_EMPTY;
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}
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ret |= tag << (2 * i);
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}
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return ret;
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}
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/*
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* FXSR floating point environment conversions.
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*/
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static void
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convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
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struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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env->cwd = fxsave->cwd | 0xffff0000u;
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env->swd = fxsave->swd | 0xffff0000u;
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env->twd = twd_fxsr_to_i387(fxsave);
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#ifdef CONFIG_X86_64
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env->fip = fxsave->rip;
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env->foo = fxsave->rdp;
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if (tsk == current) {
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/*
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* should be actually ds/cs at fpu exception time, but
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* that information is not available in 64bit mode.
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*/
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asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
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asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
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} else {
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struct pt_regs *regs = task_pt_regs(tsk);
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env->fos = 0xffff0000 | tsk->thread.ds;
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env->fcs = regs->cs;
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}
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#else
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env->fip = fxsave->fip;
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env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
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env->foo = fxsave->foo;
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env->fos = fxsave->fos;
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#endif
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for (i = 0; i < 8; ++i)
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memcpy(&to[i], &from[i], sizeof(to[0]));
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}
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static void convert_to_fxsr(struct task_struct *tsk,
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const struct user_i387_ia32_struct *env)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
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struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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fxsave->cwd = env->cwd;
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fxsave->swd = env->swd;
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fxsave->twd = twd_i387_to_fxsr(env->twd);
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fxsave->fop = (u16) ((u32) env->fcs >> 16);
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#ifdef CONFIG_X86_64
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fxsave->rip = env->fip;
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fxsave->rdp = env->foo;
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/* cs and ds ignored */
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#else
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fxsave->fip = env->fip;
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fxsave->fcs = (env->fcs & 0xffff);
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fxsave->foo = env->foo;
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fxsave->fos = env->fos;
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#endif
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for (i = 0; i < 8; ++i)
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memcpy(&to[i], &from[i], sizeof(from[0]));
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}
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int fpregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct user_i387_ia32_struct env;
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int ret;
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ret = init_fpu(target);
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if (ret)
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return ret;
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if (!HAVE_HWFP)
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return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
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if (!cpu_has_fxsr) {
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|
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
&target->thread.xstate->fsave, 0,
|
|
-1);
|
|
}
|
|
|
|
if (kbuf && pos == 0 && count == sizeof(env)) {
|
|
convert_from_fxsr(kbuf, target);
|
|
return 0;
|
|
}
|
|
|
|
convert_from_fxsr(&env, target);
|
|
|
|
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
|
|
}
|
|
|
|
int fpregs_set(struct task_struct *target, const struct user_regset *regset,
|
|
unsigned int pos, unsigned int count,
|
|
const void *kbuf, const void __user *ubuf)
|
|
{
|
|
struct user_i387_ia32_struct env;
|
|
int ret;
|
|
|
|
ret = init_fpu(target);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (!HAVE_HWFP)
|
|
return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
|
|
|
|
if (!cpu_has_fxsr) {
|
|
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
&target->thread.xstate->fsave, 0, -1);
|
|
}
|
|
|
|
if (pos > 0 || count < sizeof(env))
|
|
convert_from_fxsr(&env, target);
|
|
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
|
|
if (!ret)
|
|
convert_to_fxsr(target, &env);
|
|
|
|
/*
|
|
* update the header bit in the xsave header, indicating the
|
|
* presence of FP.
|
|
*/
|
|
if (cpu_has_xsave)
|
|
target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Signal frame handlers.
|
|
*/
|
|
|
|
static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
|
|
|
|
fp->status = fp->swd;
|
|
if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
|
|
return -1;
|
|
return 1;
|
|
}
|
|
|
|
static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
|
|
struct user_i387_ia32_struct env;
|
|
int err = 0;
|
|
|
|
convert_from_fxsr(&env, tsk);
|
|
if (__copy_to_user(buf, &env, sizeof(env)))
|
|
return -1;
|
|
|
|
err |= __put_user(fx->swd, &buf->status);
|
|
err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
|
|
if (err)
|
|
return -1;
|
|
|
|
if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
|
|
return -1;
|
|
return 1;
|
|
}
|
|
|
|
static int save_i387_xsave(void __user *buf)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
struct _fpstate_ia32 __user *fx = buf;
|
|
int err = 0;
|
|
|
|
/*
|
|
* For legacy compatible, we always set FP/SSE bits in the bit
|
|
* vector while saving the state to the user context.
|
|
* This will enable us capturing any changes(during sigreturn) to
|
|
* the FP/SSE bits by the legacy applications which don't touch
|
|
* xstate_bv in the xsave header.
|
|
*
|
|
* xsave aware applications can change the xstate_bv in the xsave
|
|
* header as well as change any contents in the memory layout.
|
|
* xrestore as part of sigreturn will capture all the changes.
|
|
*/
|
|
tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
|
|
|
|
if (save_i387_fxsave(fx) < 0)
|
|
return -1;
|
|
|
|
err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
|
|
sizeof(struct _fpx_sw_bytes));
|
|
err |= __put_user(FP_XSTATE_MAGIC2,
|
|
(__u32 __user *) (buf + sig_xstate_ia32_size
|
|
- FP_XSTATE_MAGIC2_SIZE));
|
|
if (err)
|
|
return -1;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int save_i387_xstate_ia32(void __user *buf)
|
|
{
|
|
struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
|
|
struct task_struct *tsk = current;
|
|
|
|
if (!used_math())
|
|
return 0;
|
|
|
|
if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
|
|
return -EACCES;
|
|
/*
|
|
* This will cause a "finit" to be triggered by the next
|
|
* attempted FPU operation by the 'current' process.
|
|
*/
|
|
clear_used_math();
|
|
|
|
if (!HAVE_HWFP) {
|
|
return fpregs_soft_get(current, NULL,
|
|
0, sizeof(struct user_i387_ia32_struct),
|
|
NULL, fp) ? -1 : 1;
|
|
}
|
|
|
|
unlazy_fpu(tsk);
|
|
|
|
if (cpu_has_xsave)
|
|
return save_i387_xsave(fp);
|
|
if (cpu_has_fxsr)
|
|
return save_i387_fxsave(fp);
|
|
else
|
|
return save_i387_fsave(fp);
|
|
}
|
|
|
|
static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
|
|
return __copy_from_user(&tsk->thread.xstate->fsave, buf,
|
|
sizeof(struct i387_fsave_struct));
|
|
}
|
|
|
|
static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
|
|
unsigned int size)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
struct user_i387_ia32_struct env;
|
|
int err;
|
|
|
|
err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
|
|
size);
|
|
/* mxcsr reserved bits must be masked to zero for security reasons */
|
|
tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
|
|
if (err || __copy_from_user(&env, buf, sizeof(env)))
|
|
return 1;
|
|
convert_to_fxsr(tsk, &env);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int restore_i387_xsave(void __user *buf)
|
|
{
|
|
struct _fpx_sw_bytes fx_sw_user;
|
|
struct _fpstate_ia32 __user *fx_user =
|
|
((struct _fpstate_ia32 __user *) buf);
|
|
struct i387_fxsave_struct __user *fx =
|
|
(struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
|
|
struct xsave_hdr_struct *xsave_hdr =
|
|
¤t->thread.xstate->xsave.xsave_hdr;
|
|
u64 mask;
|
|
int err;
|
|
|
|
if (check_for_xstate(fx, buf, &fx_sw_user))
|
|
goto fx_only;
|
|
|
|
mask = fx_sw_user.xstate_bv;
|
|
|
|
err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
|
|
|
|
xsave_hdr->xstate_bv &= pcntxt_mask;
|
|
/*
|
|
* These bits must be zero.
|
|
*/
|
|
xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
|
|
|
|
/*
|
|
* Init the state that is not present in the memory layout
|
|
* and enabled by the OS.
|
|
*/
|
|
mask = ~(pcntxt_mask & ~mask);
|
|
xsave_hdr->xstate_bv &= mask;
|
|
|
|
return err;
|
|
fx_only:
|
|
/*
|
|
* Couldn't find the extended state information in the memory
|
|
* layout. Restore the FP/SSE and init the other extended state
|
|
* enabled by the OS.
|
|
*/
|
|
xsave_hdr->xstate_bv = XSTATE_FPSSE;
|
|
return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
|
|
}
|
|
|
|
int restore_i387_xstate_ia32(void __user *buf)
|
|
{
|
|
int err;
|
|
struct task_struct *tsk = current;
|
|
struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
|
|
|
|
if (HAVE_HWFP)
|
|
clear_fpu(tsk);
|
|
|
|
if (!buf) {
|
|
if (used_math()) {
|
|
clear_fpu(tsk);
|
|
clear_used_math();
|
|
}
|
|
|
|
return 0;
|
|
} else
|
|
if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
|
|
return -EACCES;
|
|
|
|
if (!used_math()) {
|
|
err = init_fpu(tsk);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
if (HAVE_HWFP) {
|
|
if (cpu_has_xsave)
|
|
err = restore_i387_xsave(buf);
|
|
else if (cpu_has_fxsr)
|
|
err = restore_i387_fxsave(fp, sizeof(struct
|
|
i387_fxsave_struct));
|
|
else
|
|
err = restore_i387_fsave(fp);
|
|
} else {
|
|
err = fpregs_soft_set(current, NULL,
|
|
0, sizeof(struct user_i387_ia32_struct),
|
|
NULL, fp) != 0;
|
|
}
|
|
set_used_math();
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* FPU state for core dumps.
|
|
* This is only used for a.out dumps now.
|
|
* It is declared generically using elf_fpregset_t (which is
|
|
* struct user_i387_struct) but is in fact only used for 32-bit
|
|
* dumps, so on 64-bit it is really struct user_i387_ia32_struct.
|
|
*/
|
|
int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
int fpvalid;
|
|
|
|
fpvalid = !!used_math();
|
|
if (fpvalid)
|
|
fpvalid = !fpregs_get(tsk, NULL,
|
|
0, sizeof(struct user_i387_ia32_struct),
|
|
fpu, NULL);
|
|
|
|
return fpvalid;
|
|
}
|
|
EXPORT_SYMBOL(dump_fpu);
|
|
|
|
#endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
|