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The Allwinner D1 family of SoCs contain a PPU power domain controller separate from the PRCM. It can power down the video engine and DSP, and it contains special logic for hardware-assisted CPU idle. Other recent Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126063419.15971-2-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
11 lines
258 B
C
11 lines
258 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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#ifndef _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
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#define _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_
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#define PD_CPU 0
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#define PD_VE 1
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#define PD_DSP 2
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#endif /* _DT_BINDINGS_POWER_SUN20I_D1_PPU_H_ */
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