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cea65dbd6a
Add a dsi_cfg entry for APQ8064. Since this is the first DSIv2 chip to be supported, add a list of bus clocks that are required by the DSIv2 block. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
120 lines
3.4 KiB
C
120 lines
3.4 KiB
C
/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "dsi_cfg.h"
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static const char * const dsi_v2_bus_clk_names[] = {
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"core_mmss_clk", "iface_clk", "bus_clk",
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};
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static const struct msm_dsi_config apq8064_dsi_cfg = {
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.io_offset = 0,
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.reg_cfg = {
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.num = 3,
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.regs = {
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{"vdda", 1200000, 1200000, 100000, 100},
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{"avdd", 3000000, 3000000, 110000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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.bus_clk_names = dsi_v2_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
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};
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static const char * const dsi_6g_bus_clk_names[] = {
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"mdp_core_clk", "iface_clk", "bus_clk", "core_mmss_clk",
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};
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static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 3000000, 3000000, 150000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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};
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static const char * const dsi_8916_bus_clk_names[] = {
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"mdp_core_clk", "iface_clk", "bus_clk",
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};
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static const struct msm_dsi_config msm8916_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 4,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdd", 2850000, 2850000, 100000, 100},
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{"vdda", 1200000, 1200000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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},
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},
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.bus_clk_names = dsi_8916_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
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};
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static const struct msm_dsi_config msm8994_dsi_cfg = {
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.io_offset = DSI_6G_REG_SHIFT,
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.reg_cfg = {
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.num = 7,
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.regs = {
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{"gdsc", -1, -1, -1, -1},
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{"vdda", 1250000, 1250000, 100000, 100},
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{"vddio", 1800000, 1800000, 100000, 100},
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{"vcca", 1000000, 1000000, 10000, 100},
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{"vdd", 1800000, 1800000, 100000, 100},
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{"lab_reg", -1, -1, -1, -1},
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{"ibb_reg", -1, -1, -1, -1},
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},
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},
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.bus_clk_names = dsi_6g_bus_clk_names,
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.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
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};
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static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
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{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
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&msm8974_apq8084_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
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{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
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};
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const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
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{
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const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
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int i;
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for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
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if ((dsi_cfg_handlers[i].major == major) &&
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(dsi_cfg_handlers[i].minor == minor)) {
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cfg_hnd = &dsi_cfg_handlers[i];
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break;
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}
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}
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return cfg_hnd;
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}
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