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529766e0a0
MP2 controllers have two separate busses, so may accommodate up to two I2C adapters. Those adapters are listed in the ACPI namespace with the "AMDI0011" HID, and probed by a platform driver. Communication with the MP2 takes place through MMIO registers, or through DMA for more than 32 bytes transfers. This is major rework of the patch submitted by Nehal-bakulchandra Shah from AMD (https://patchwork.kernel.org/patch/10597369/). Most of the event handling of v3 was rewritten to make it work with more than one bus (e.g on Ryzen-based Lenovo Yoga 530), and this version contains many other improvements. Signed-off-by: Elie Morisse <syniurge@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
484 lines
12 KiB
C
484 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* AMD MP2 PCIe communication driver
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*
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* Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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* Elie Morisse <syniurge@gmail.com>
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*/
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include "i2c-amd-mp2.h"
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#include <linux/io-64-nonatomic-lo-hi.h>
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static void amd_mp2_c2p_mutex_lock(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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/* there is only one data mailbox for two i2c adapters */
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mutex_lock(&privdata->c2p_lock);
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privdata->c2p_lock_busid = i2c_common->bus_id;
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}
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static void amd_mp2_c2p_mutex_unlock(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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if (unlikely(privdata->c2p_lock_busid != i2c_common->bus_id)) {
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dev_warn(ndev_dev(privdata),
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"bus %d attempting to unlock C2P locked by bus %d\n",
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i2c_common->bus_id, privdata->c2p_lock_busid);
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return;
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}
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mutex_unlock(&privdata->c2p_lock);
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}
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static int amd_mp2_cmd(struct amd_i2c_common *i2c_common,
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union i2c_cmd_base i2c_cmd_base)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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void __iomem *reg;
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i2c_common->reqcmd = i2c_cmd_base.s.i2c_cmd;
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reg = privdata->mmio + ((i2c_cmd_base.s.bus_id == 1) ?
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AMD_C2P_MSG1 : AMD_C2P_MSG0);
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writel(i2c_cmd_base.ul, reg);
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return 0;
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}
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int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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union i2c_cmd_base i2c_cmd_base;
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dev_dbg(ndev_dev(privdata), "%s id: %d\n", __func__,
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i2c_common->bus_id);
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i2c_cmd_base.ul = 0;
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i2c_cmd_base.s.i2c_cmd = enable ? i2c_enable : i2c_disable;
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i2c_cmd_base.s.bus_id = i2c_common->bus_id;
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i2c_cmd_base.s.i2c_speed = i2c_common->i2c_speed;
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amd_mp2_c2p_mutex_lock(i2c_common);
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return amd_mp2_cmd(i2c_common, i2c_cmd_base);
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}
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EXPORT_SYMBOL_GPL(amd_mp2_bus_enable_set);
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static void amd_mp2_cmd_rw_fill(struct amd_i2c_common *i2c_common,
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union i2c_cmd_base *i2c_cmd_base,
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enum i2c_cmd reqcmd)
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{
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i2c_cmd_base->s.i2c_cmd = reqcmd;
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i2c_cmd_base->s.bus_id = i2c_common->bus_id;
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i2c_cmd_base->s.i2c_speed = i2c_common->i2c_speed;
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i2c_cmd_base->s.slave_addr = i2c_common->msg->addr;
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i2c_cmd_base->s.length = i2c_common->msg->len;
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}
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int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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union i2c_cmd_base i2c_cmd_base;
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amd_mp2_cmd_rw_fill(i2c_common, &i2c_cmd_base, reqcmd);
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amd_mp2_c2p_mutex_lock(i2c_common);
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if (i2c_common->msg->len <= 32) {
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i2c_cmd_base.s.mem_type = use_c2pmsg;
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if (reqcmd == i2c_write)
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memcpy_toio(privdata->mmio + AMD_C2P_MSG2,
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i2c_common->msg->buf,
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i2c_common->msg->len);
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} else {
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i2c_cmd_base.s.mem_type = use_dram;
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writeq((u64)i2c_common->dma_addr,
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privdata->mmio + AMD_C2P_MSG2);
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}
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return amd_mp2_cmd(i2c_common, i2c_cmd_base);
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}
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EXPORT_SYMBOL_GPL(amd_mp2_rw);
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static void amd_mp2_pci_check_rw_event(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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int len = i2c_common->eventval.r.length;
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u32 slave_addr = i2c_common->eventval.r.slave_addr;
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bool err = false;
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if (unlikely(len != i2c_common->msg->len)) {
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dev_err(ndev_dev(privdata),
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"length %d in event doesn't match buffer length %d!\n",
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len, i2c_common->msg->len);
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err = true;
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}
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if (unlikely(slave_addr != i2c_common->msg->addr)) {
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dev_err(ndev_dev(privdata),
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"unexpected slave address %x (expected: %x)!\n",
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slave_addr, i2c_common->msg->addr);
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err = true;
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}
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if (!err)
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i2c_common->cmd_success = true;
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}
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static void __amd_mp2_process_event(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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enum status_type sts = i2c_common->eventval.r.status;
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enum response_type res = i2c_common->eventval.r.response;
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int len = i2c_common->eventval.r.length;
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if (res != command_success) {
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if (res != command_failed)
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dev_err(ndev_dev(privdata), "invalid response to i2c command!\n");
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return;
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}
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switch (i2c_common->reqcmd) {
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case i2c_read:
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if (sts == i2c_readcomplete_event) {
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amd_mp2_pci_check_rw_event(i2c_common);
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if (len <= 32)
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memcpy_fromio(i2c_common->msg->buf,
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privdata->mmio + AMD_C2P_MSG2,
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len);
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} else if (sts != i2c_readfail_event) {
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dev_err(ndev_dev(privdata),
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"invalid i2c status after read (%d)!\n", sts);
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}
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break;
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case i2c_write:
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if (sts == i2c_writecomplete_event)
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amd_mp2_pci_check_rw_event(i2c_common);
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else if (sts != i2c_writefail_event)
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dev_err(ndev_dev(privdata),
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"invalid i2c status after write (%d)!\n", sts);
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break;
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case i2c_enable:
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if (sts == i2c_busenable_complete)
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i2c_common->cmd_success = true;
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else if (sts != i2c_busenable_failed)
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dev_err(ndev_dev(privdata),
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"invalid i2c status after bus enable (%d)!\n",
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sts);
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break;
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case i2c_disable:
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if (sts == i2c_busdisable_complete)
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i2c_common->cmd_success = true;
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else if (sts != i2c_busdisable_failed)
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dev_err(ndev_dev(privdata),
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"invalid i2c status after bus disable (%d)!\n",
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sts);
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break;
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default:
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break;
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}
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}
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void amd_mp2_process_event(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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if (unlikely(i2c_common->reqcmd == i2c_none)) {
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dev_warn(ndev_dev(privdata),
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"received msg but no cmd was sent (bus = %d)!\n",
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i2c_common->bus_id);
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return;
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}
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__amd_mp2_process_event(i2c_common);
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i2c_common->reqcmd = i2c_none;
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amd_mp2_c2p_mutex_unlock(i2c_common);
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}
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EXPORT_SYMBOL_GPL(amd_mp2_process_event);
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static irqreturn_t amd_mp2_irq_isr(int irq, void *dev)
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{
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struct amd_mp2_dev *privdata = dev;
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struct amd_i2c_common *i2c_common;
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u32 val;
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unsigned int bus_id;
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void __iomem *reg;
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enum irqreturn ret = IRQ_NONE;
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for (bus_id = 0; bus_id < 2; bus_id++) {
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i2c_common = privdata->busses[bus_id];
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if (!i2c_common)
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continue;
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reg = privdata->mmio + ((bus_id == 0) ?
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AMD_P2C_MSG1 : AMD_P2C_MSG2);
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val = readl(reg);
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if (val != 0) {
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writel(0, reg);
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writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
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i2c_common->eventval.ul = val;
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i2c_common->cmd_completion(i2c_common);
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ret = IRQ_HANDLED;
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}
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}
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if (ret != IRQ_HANDLED) {
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val = readl(privdata->mmio + AMD_P2C_MSG_INTEN);
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if (val != 0) {
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writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
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dev_warn(ndev_dev(privdata),
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"received irq without message\n");
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ret = IRQ_HANDLED;
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}
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}
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return ret;
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}
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void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common)
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{
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i2c_common->reqcmd = i2c_none;
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amd_mp2_c2p_mutex_unlock(i2c_common);
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}
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EXPORT_SYMBOL_GPL(amd_mp2_rw_timeout);
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int amd_mp2_register_cb(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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if (i2c_common->bus_id > 1)
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return -EINVAL;
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if (privdata->busses[i2c_common->bus_id]) {
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dev_err(ndev_dev(privdata),
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"Bus %d already taken!\n", i2c_common->bus_id);
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return -EINVAL;
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}
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privdata->busses[i2c_common->bus_id] = i2c_common;
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return 0;
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}
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EXPORT_SYMBOL_GPL(amd_mp2_register_cb);
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int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common)
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{
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struct amd_mp2_dev *privdata = i2c_common->mp2_dev;
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privdata->busses[i2c_common->bus_id] = NULL;
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return 0;
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}
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EXPORT_SYMBOL_GPL(amd_mp2_unregister_cb);
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static void amd_mp2_clear_reg(struct amd_mp2_dev *privdata)
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{
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int reg;
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for (reg = AMD_C2P_MSG0; reg <= AMD_C2P_MSG9; reg += 4)
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writel(0, privdata->mmio + reg);
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for (reg = AMD_P2C_MSG1; reg <= AMD_P2C_MSG2; reg += 4)
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writel(0, privdata->mmio + reg);
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}
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static int amd_mp2_pci_init(struct amd_mp2_dev *privdata,
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struct pci_dev *pci_dev)
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{
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int rc;
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pci_set_drvdata(pci_dev, privdata);
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rc = pcim_enable_device(pci_dev);
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if (rc) {
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dev_err(ndev_dev(privdata), "Failed to enable MP2 PCI device\n");
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goto err_pci_enable;
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}
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rc = pcim_iomap_regions(pci_dev, 1 << 2, pci_name(pci_dev));
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if (rc) {
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dev_err(ndev_dev(privdata), "I/O memory remapping failed\n");
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goto err_pci_enable;
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}
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privdata->mmio = pcim_iomap_table(pci_dev)[2];
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pci_set_master(pci_dev);
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rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64));
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if (rc) {
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rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
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if (rc)
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goto err_dma_mask;
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}
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/* Set up intx irq */
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writel(0, privdata->mmio + AMD_P2C_MSG_INTEN);
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pci_intx(pci_dev, 1);
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rc = devm_request_irq(&pci_dev->dev, pci_dev->irq, amd_mp2_irq_isr,
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IRQF_SHARED, dev_name(&pci_dev->dev), privdata);
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if (rc)
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dev_err(&pci_dev->dev, "Failure requesting irq %i: %d\n",
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pci_dev->irq, rc);
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return rc;
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err_dma_mask:
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pci_clear_master(pci_dev);
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err_pci_enable:
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pci_set_drvdata(pci_dev, NULL);
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return rc;
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}
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static int amd_mp2_pci_probe(struct pci_dev *pci_dev,
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const struct pci_device_id *id)
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{
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struct amd_mp2_dev *privdata;
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int rc;
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privdata = devm_kzalloc(&pci_dev->dev, sizeof(*privdata), GFP_KERNEL);
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if (!privdata)
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return -ENOMEM;
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rc = amd_mp2_pci_init(privdata, pci_dev);
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if (rc)
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return rc;
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mutex_init(&privdata->c2p_lock);
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privdata->pci_dev = pci_dev;
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pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
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pm_runtime_use_autosuspend(&pci_dev->dev);
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pm_runtime_put_autosuspend(&pci_dev->dev);
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pm_runtime_allow(&pci_dev->dev);
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privdata->probed = true;
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dev_info(&pci_dev->dev, "MP2 device registered.\n");
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return 0;
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}
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static void amd_mp2_pci_remove(struct pci_dev *pci_dev)
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{
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struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
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pm_runtime_forbid(&pci_dev->dev);
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pm_runtime_get_noresume(&pci_dev->dev);
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pci_intx(pci_dev, 0);
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pci_clear_master(pci_dev);
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amd_mp2_clear_reg(privdata);
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}
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#ifdef CONFIG_PM
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static int amd_mp2_pci_suspend(struct device *dev)
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{
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struct pci_dev *pci_dev = to_pci_dev(dev);
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struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
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struct amd_i2c_common *i2c_common;
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unsigned int bus_id;
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int ret = 0;
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for (bus_id = 0; bus_id < 2; bus_id++) {
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i2c_common = privdata->busses[bus_id];
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if (i2c_common)
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i2c_common->suspend(i2c_common);
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}
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ret = pci_save_state(pci_dev);
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if (ret) {
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dev_err(ndev_dev(privdata),
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"pci_save_state failed = %d\n", ret);
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return ret;
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}
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pci_disable_device(pci_dev);
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return ret;
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}
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static int amd_mp2_pci_resume(struct device *dev)
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{
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struct pci_dev *pci_dev = to_pci_dev(dev);
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struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev);
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struct amd_i2c_common *i2c_common;
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unsigned int bus_id;
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int ret = 0;
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pci_restore_state(pci_dev);
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ret = pci_enable_device(pci_dev);
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if (ret < 0) {
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dev_err(ndev_dev(privdata),
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"pci_enable_device failed = %d\n", ret);
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return ret;
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}
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for (bus_id = 0; bus_id < 2; bus_id++) {
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i2c_common = privdata->busses[bus_id];
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if (i2c_common) {
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ret = i2c_common->resume(i2c_common);
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if (ret < 0)
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return ret;
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}
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}
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return ret;
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}
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static UNIVERSAL_DEV_PM_OPS(amd_mp2_pci_pm_ops, amd_mp2_pci_suspend,
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amd_mp2_pci_resume, NULL);
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#endif /* CONFIG_PM */
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static const struct pci_device_id amd_mp2_pci_tbl[] = {
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{PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2)},
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{0}
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};
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MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
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static struct pci_driver amd_mp2_pci_driver = {
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.name = "i2c_amd_mp2",
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.id_table = amd_mp2_pci_tbl,
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.probe = amd_mp2_pci_probe,
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.remove = amd_mp2_pci_remove,
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#ifdef CONFIG_PM
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.driver = {
|
|
.pm = &amd_mp2_pci_pm_ops,
|
|
},
|
|
#endif
|
|
};
|
|
module_pci_driver(amd_mp2_pci_driver);
|
|
|
|
static int amd_mp2_device_match(struct device *dev, void *data)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
struct amd_mp2_dev *amd_mp2_find_device(void)
|
|
{
|
|
struct device *dev;
|
|
struct pci_dev *pci_dev;
|
|
|
|
dev = driver_find_device(&amd_mp2_pci_driver.driver, NULL, NULL,
|
|
amd_mp2_device_match);
|
|
if (!dev)
|
|
return NULL;
|
|
|
|
pci_dev = to_pci_dev(dev);
|
|
return (struct amd_mp2_dev *)pci_get_drvdata(pci_dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(amd_mp2_find_device);
|
|
|
|
MODULE_DESCRIPTION("AMD(R) PCI-E MP2 I2C Controller Driver");
|
|
MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>");
|
|
MODULE_AUTHOR("Elie Morisse <syniurge@gmail.com>");
|
|
MODULE_LICENSE("Dual BSD/GPL");
|