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MT8192 has the same sw0 reset offset as MT8186: add the parameter to be able to use mmsys as a reset controller for managing at least the DSI reset line. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20220323091932.10648-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
280 lines
7.2 KiB
C
280 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: James Liao <jamesjj.liao@mediatek.com>
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/soc/mediatek/mtk-mmsys.h>
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#include "mtk-mmsys.h"
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#include "mt8167-mmsys.h"
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#include "mt8183-mmsys.h"
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#include "mt8186-mmsys.h"
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#include "mt8192-mmsys.h"
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#include "mt8365-mmsys.h"
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static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
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.clk_driver = "clk-mt2701-mm",
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.routes = mmsys_default_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
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};
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static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
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.clk_driver = "clk-mt2712-mm",
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.routes = mmsys_default_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
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};
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static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = {
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.clk_driver = "clk-mt6779-mm",
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};
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static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = {
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.clk_driver = "clk-mt6797-mm",
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};
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static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
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.clk_driver = "clk-mt8167-mm",
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.routes = mt8167_mmsys_routing_table,
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.num_routes = ARRAY_SIZE(mt8167_mmsys_routing_table),
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};
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static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
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.clk_driver = "clk-mt8173-mm",
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.routes = mmsys_default_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
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.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
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};
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static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
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.clk_driver = "clk-mt8183-mm",
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.routes = mmsys_mt8183_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
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.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
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};
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static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
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.clk_driver = "clk-mt8186-mm",
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.routes = mmsys_mt8186_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_mt8186_routing_table),
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.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
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};
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static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
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.clk_driver = "clk-mt8192-mm",
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.routes = mmsys_mt8192_routing_table,
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.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
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.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
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};
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static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
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.clk_driver = "clk-mt8365-mm",
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.routes = mt8365_mmsys_routing_table,
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.num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
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};
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struct mtk_mmsys {
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void __iomem *regs;
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const struct mtk_mmsys_driver_data *data;
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spinlock_t lock; /* protects mmsys_sw_rst_b reg */
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struct reset_controller_dev rcdev;
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};
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void mtk_mmsys_ddp_connect(struct device *dev,
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enum mtk_ddp_comp_id cur,
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enum mtk_ddp_comp_id next)
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{
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struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
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const struct mtk_mmsys_routes *routes = mmsys->data->routes;
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u32 reg;
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int i;
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for (i = 0; i < mmsys->data->num_routes; i++)
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if (cur == routes[i].from_comp && next == routes[i].to_comp) {
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reg = readl_relaxed(mmsys->regs + routes[i].addr);
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reg &= ~routes[i].mask;
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reg |= routes[i].val;
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writel_relaxed(reg, mmsys->regs + routes[i].addr);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
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void mtk_mmsys_ddp_disconnect(struct device *dev,
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enum mtk_ddp_comp_id cur,
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enum mtk_ddp_comp_id next)
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{
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struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
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const struct mtk_mmsys_routes *routes = mmsys->data->routes;
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u32 reg;
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int i;
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for (i = 0; i < mmsys->data->num_routes; i++)
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if (cur == routes[i].from_comp && next == routes[i].to_comp) {
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reg = readl_relaxed(mmsys->regs + routes[i].addr);
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reg &= ~routes[i].mask;
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writel_relaxed(reg, mmsys->regs + routes[i].addr);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
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static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
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bool assert)
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{
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struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&mmsys->lock, flags);
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reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
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if (assert)
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reg &= ~BIT(id);
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else
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reg |= BIT(id);
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writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
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spin_unlock_irqrestore(&mmsys->lock, flags);
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return 0;
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}
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static int mtk_mmsys_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
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{
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return mtk_mmsys_reset_update(rcdev, id, true);
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}
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static int mtk_mmsys_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
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{
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return mtk_mmsys_reset_update(rcdev, id, false);
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}
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static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id)
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{
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int ret;
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ret = mtk_mmsys_reset_assert(rcdev, id);
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if (ret)
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return ret;
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usleep_range(1000, 1100);
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return mtk_mmsys_reset_deassert(rcdev, id);
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}
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static const struct reset_control_ops mtk_mmsys_reset_ops = {
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.assert = mtk_mmsys_reset_assert,
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.deassert = mtk_mmsys_reset_deassert,
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.reset = mtk_mmsys_reset,
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};
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static int mtk_mmsys_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct platform_device *clks;
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struct platform_device *drm;
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struct mtk_mmsys *mmsys;
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int ret;
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mmsys = devm_kzalloc(dev, sizeof(*mmsys), GFP_KERNEL);
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if (!mmsys)
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return -ENOMEM;
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mmsys->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(mmsys->regs)) {
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ret = PTR_ERR(mmsys->regs);
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dev_err(dev, "Failed to ioremap mmsys registers: %d\n", ret);
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return ret;
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}
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spin_lock_init(&mmsys->lock);
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mmsys->rcdev.owner = THIS_MODULE;
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mmsys->rcdev.nr_resets = 32;
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mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
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mmsys->rcdev.of_node = pdev->dev.of_node;
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ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);
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if (ret) {
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dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n", ret);
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return ret;
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}
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mmsys->data = of_device_get_match_data(&pdev->dev);
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platform_set_drvdata(pdev, mmsys);
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clks = platform_device_register_data(&pdev->dev, mmsys->data->clk_driver,
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PLATFORM_DEVID_AUTO, NULL, 0);
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if (IS_ERR(clks))
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return PTR_ERR(clks);
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drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
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PLATFORM_DEVID_AUTO, NULL, 0);
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if (IS_ERR(drm)) {
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platform_device_unregister(clks);
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return PTR_ERR(drm);
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}
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return 0;
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}
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static const struct of_device_id of_match_mtk_mmsys[] = {
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{
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.compatible = "mediatek,mt2701-mmsys",
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.data = &mt2701_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt2712-mmsys",
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.data = &mt2712_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt6779-mmsys",
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.data = &mt6779_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt6797-mmsys",
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.data = &mt6797_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8167-mmsys",
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.data = &mt8167_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8173-mmsys",
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.data = &mt8173_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8183-mmsys",
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.data = &mt8183_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8186-mmsys",
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.data = &mt8186_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8192-mmsys",
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.data = &mt8192_mmsys_driver_data,
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},
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{
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.compatible = "mediatek,mt8365-mmsys",
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.data = &mt8365_mmsys_driver_data,
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},
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{ }
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};
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static struct platform_driver mtk_mmsys_drv = {
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.driver = {
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.name = "mtk-mmsys",
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.of_match_table = of_match_mtk_mmsys,
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},
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.probe = mtk_mmsys_probe,
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};
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builtin_platform_driver(mtk_mmsys_drv);
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