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522ccdb6fd
This change makes the rtc on the exynos5250 and 5440 disabled by default to match exynos4. Ever since the common clock framework came in, exynos5250 boards have dumped lots of warnings in the boot log. It turns out that we don't see those on exynos4 since the rtc is disabled by default. While we need to get to the bottom of the problems with the RTC, it still makes sense to have the default state of the RTC on exynos boards match. For the record, warnings look like this: ------------[ cut here ]------------ WARNING: at drivers/clk/clk.c:771 __clk_enable+0x34/0xb0() Modules linked in: [<80015bfc>] (unwind_backtrace+0x0/0xec) from [<804717f0>] (dump_stack+0x20/0x24) [<804717f0>] (dump_stack+0x20/0x24) from [<80023cd0>] (warn_slowpath_common+0x5c/0x7c) [<80023cd0>] (warn_slowpath_common+0x5c/0x7c) from [<80023d1c>] (warn_slowpath_null+0x2c/0x34) [<80023d1c>] (warn_slowpath_null+0x2c/0x34) from [<8035ddb0>] (__clk_enable+0x34/0xb0) [<8035ddb0>] (__clk_enable+0x34/0xb0) from [<8035de54>] (clk_enable+0x28/0x3c) [<8035de54>] (clk_enable+0x28/0x3c) from [<8031a160>] (s3c_rtc_probe+0xf4/0x434) [<8031a160>] (s3c_rtc_probe+0xf4/0x434) from [<8028e288>] (platform_drv_probe+0x24/0x28) [<8028e288>] (platform_drv_probe+0x24/0x28) from [<8028ce10>] (driver_probe_device+0xbc/0x22c) [<8028ce10>] (driver_probe_device+0xbc/0x22c) from [<8028cff8>] (__driver_attach+0x78/0x9c) [<8028cff8>] (__driver_attach+0x78/0x9c) from [<8028bdfc>] (bus_for_each_dev+0x64/0xac) [<8028bdfc>] (bus_for_each_dev+0x64/0xac) from [<8028c7e0>] (driver_attach+0x28/0x30) [<8028c7e0>] (driver_attach+0x28/0x30) from [<8028c43c>] (bus_add_driver+0xe0/0x234) [<8028c43c>] (bus_add_driver+0xe0/0x234) from [<8028d55c>] (driver_register+0xac/0x13c) [<8028d55c>] (driver_register+0xac/0x13c) from [<8028e4f4>] (platform_driver_register+0x54/0x68) [<8028e4f4>] (platform_driver_register+0x54/0x68) from [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c) [<8065c944>] (s3c_rtc_driver_init+0x14/0x1c) from [<800086d8>] (do_one_initcall+0x60/0x138) [<800086d8>] (do_one_initcall+0x60/0x138) from [<80633a8c>] (kernel_init_freeable+0x108/0x1d0) [<80633a8c>] (kernel_init_freeable+0x108/0x1d0) from [<8046d2f8>] (kernel_init+0x1c/0xf4) [<8046d2f8>] (kernel_init+0x1c/0xf4) from [<8000e358>] (ret_from_fork+0x14/0x20) ---[ end trace 4bcdc801c868d73f ]--- Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Olof Johansson <olof@lixom.net>
183 lines
3.7 KiB
Plaintext
183 lines
3.7 KiB
Plaintext
/*
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* SAMSUNG EXYNOS5440 SoC device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "samsung,exynos5440";
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interrupt-parent = <&gic>;
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clock: clock-controller@0x160000 {
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compatible = "samsung,exynos5440-clock";
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reg = <0x160000 0x1000>;
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#clock-cells = <1>;
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};
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gic:interrupt-controller@2E0000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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reg = <0>;
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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reg = <1>;
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};
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cpu@2 {
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compatible = "arm,cortex-a15";
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reg = <2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a15";
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reg = <3>;
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};
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};
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timer {
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compatible = "arm,cortex-a15-timer",
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"arm,armv7-timer";
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interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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clock-frequency = <50000000>;
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};
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serial@B0000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0xB0000 0x1000>;
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interrupts = <0 2 0>;
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clocks = <&clock 21>, <&clock 21>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@C0000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0xC0000 0x1000>;
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interrupts = <0 3 0>;
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clocks = <&clock 21>, <&clock 21>;
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clock-names = "uart", "clk_uart_baud0";
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};
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spi {
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compatible = "samsung,exynos4210-spi";
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reg = <0xD0000 0x1000>;
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interrupts = <0 4 0>;
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tx-dma-channel = <&pdma0 5>; /* preliminary */
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rx-dma-channel = <&pdma0 4>; /* preliminary */
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 21>, <&clock 16>;
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clock-names = "spi", "spi_busclk0";
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};
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pinctrl {
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compatible = "samsung,exynos5440-pinctrl";
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reg = <0xE0000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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#gpio-cells = <2>;
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fan: fan {
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samsung,exynos5440-pin-function = <1>;
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};
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hdd_led0: hdd_led0 {
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samsung,exynos5440-pin-function = <2>;
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};
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hdd_led1: hdd_led1 {
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samsung,exynos5440-pin-function = <3>;
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};
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uart1: uart1 {
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samsung,exynos5440-pin-function = <4>;
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};
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};
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i2c@F0000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0xF0000 0x1000>;
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interrupts = <0 5 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 21>;
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clock-names = "i2c";
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};
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i2c@100000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0x100000 0x1000>;
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interrupts = <0 6 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 21>;
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clock-names = "i2c";
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};
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watchdog {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x110000 0x1000>;
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interrupts = <0 1 0>;
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clocks = <&clock 21>;
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clock-names = "watchdog";
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "arm,amba-bus";
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interrupt-parent = <&gic>;
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ranges;
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pdma0: pdma@121A0000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x120000 0x1000>;
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interrupts = <0 34 0>;
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clocks = <&clock 21>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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pdma1: pdma@121B0000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121000 0x1000>;
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interrupts = <0 35 0>;
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clocks = <&clock 21>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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};
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rtc {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x130000 0x1000>;
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interrupts = <0 17 0>, <0 16 0>;
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clocks = <&clock 21>;
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clock-names = "rtc";
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status = "disabled";
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};
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};
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