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Instead of grouping all vendor extensions into the same riscv_isa_ext that standard instructions use, create a struct "riscv_isa_vendor_ext_data_list" that allows each vendor to maintain their vendor extensions independently of the standard extensions. xandespmu is currently the only vendor extension so that is the only extension that is affected by this change. An additional benefit of this is that the extensions of each vendor can be conditionally enabled. A config RISCV_ISA_VENDOR_EXT_ANDES has been added to allow for that. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andy Chiu <andy.chiu@sifive.com> Tested-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Link: https://lore.kernel.org/r/20240719-support_vendor_extensions-v3-1-0af7587bbec0@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2024 Rivos, Inc
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*/
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#include <asm/vendorid_list.h>
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#include <asm/vendor_extensions.h>
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#include <asm/vendor_extensions/andes.h>
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#include <linux/array_size.h>
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#include <linux/types.h>
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struct riscv_isa_vendor_ext_data_list *riscv_isa_vendor_ext_list[] = {
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
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&riscv_isa_vendor_ext_list_andes,
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#endif
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};
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const size_t riscv_isa_vendor_ext_list_size = ARRAY_SIZE(riscv_isa_vendor_ext_list);
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/**
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* __riscv_isa_vendor_extension_available() - Check whether given vendor
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* extension is available or not.
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*
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* @cpu: check if extension is available on this cpu
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* @vendor: vendor that the extension is a member of
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* @bit: bit position of the desired extension
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* Return: true or false
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*
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* NOTE: When cpu is -1, will check if extension is available on all cpus
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*/
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bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsigned int bit)
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{
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struct riscv_isavendorinfo *bmap;
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struct riscv_isavendorinfo *cpu_bmap;
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switch (vendor) {
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#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
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case ANDES_VENDOR_ID:
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bmap = &riscv_isa_vendor_ext_list_andes.all_harts_isa_bitmap;
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cpu_bmap = &riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap[cpu];
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break;
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#endif
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default:
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return false;
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}
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if (cpu != -1)
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bmap = &cpu_bmap[cpu];
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if (bit >= RISCV_ISA_VENDOR_EXT_MAX)
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return false;
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return test_bit(bit, bmap->isa) ? true : false;
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}
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EXPORT_SYMBOL_GPL(__riscv_isa_vendor_extension_available);
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