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The R7S9210 belongs to the RZ/A2 SoC series Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Rob Herring <robh@kernel.org>
32 lines
988 B
Plaintext
32 lines
988 B
Plaintext
* Renesas OS Timer (OSTM)
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The OSTM is a multi-channel 32-bit timer/counter with fixed clock
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source that can operate in either interval count down timer or free-running
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compare match mode.
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Channels are independent from each other.
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Required Properties:
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- compatible: must be one or more of the following:
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- "renesas,r7s72100-ostm" for the R7S72100 (RZ/A1) OSTM
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- "renesas,r7s9210-ostm" for the R7S9210 (RZ/A2) OSTM
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- "renesas,ostm" for any OSTM
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This is a fallback for the above renesas,*-ostm entries
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- reg: base address and length of the register block for a timer channel.
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- interrupts: interrupt specifier for the timer channel.
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- clocks: clock specifier for the timer channel.
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Example: R7S72100 (RZ/A1H) OSTM node
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ostm0: timer@fcfec000 {
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compatible = "renesas,r7s72100-ostm", "renesas,ostm";
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reg = <0xfcfec000 0x30>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
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clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
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power-domains = <&cpg_clocks>;
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};
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