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v2: individually allocate chain array, since chain node is free independently. v3: all existing points must be already signaled before cpu perform signal operation, so add check condition for that. v4: remove v3 change and add checking to prevent out-of-order v5: unify binary and timeline Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Cc: Tobias Hector <Tobias.Hector@amd.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Dave Airlie <airlied@redhat.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/295792/?series=58813&rev=1 |
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amdgpu_drm.h | ||
armada_drm.h | ||
drm_fourcc.h | ||
drm_mode.h | ||
drm_sarea.h | ||
drm.h | ||
etnaviv_drm.h | ||
exynos_drm.h | ||
i810_drm.h | ||
i915_drm.h | ||
mga_drm.h | ||
msm_drm.h | ||
nouveau_drm.h | ||
omap_drm.h | ||
qxl_drm.h | ||
r128_drm.h | ||
radeon_drm.h | ||
savage_drm.h | ||
sis_drm.h | ||
tegra_drm.h | ||
v3d_drm.h | ||
vc4_drm.h | ||
vgem_drm.h | ||
via_drm.h | ||
virtgpu_drm.h | ||
vmwgfx_drm.h |