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5eea6c9712
The usb_dmac_get_current_residue function used to take a signed integer as a pos parameter. The only callers of this function passes an unsigned integer to it. Therefore to make it obviously safe, let's just make this an unsgined integer as this is used in pointer arithmetics. Signed-off-by: Jordy Zomer <jordy@pwning.systems> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210731091939.510816-1-jordy@pwning.systems Signed-off-by: Vinod Koul <vkoul@kernel.org>
915 lines
23 KiB
C
915 lines
23 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas USB DMA Controller Driver
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* based on rcar-dmac.c
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* Copyright (C) 2014 Renesas Electronics Inc.
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* Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*/
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_dma.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "../dmaengine.h"
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#include "../virt-dma.h"
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/*
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* struct usb_dmac_sg - Descriptor for a hardware transfer
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* @mem_addr: memory address
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* @size: transfer size in bytes
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*/
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struct usb_dmac_sg {
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dma_addr_t mem_addr;
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u32 size;
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};
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/*
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* struct usb_dmac_desc - USB DMA Transfer Descriptor
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* @vd: base virtual channel DMA transaction descriptor
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* @direction: direction of the DMA transfer
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* @sg_allocated_len: length of allocated sg
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* @sg_len: length of sg
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* @sg_index: index of sg
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* @residue: residue after the DMAC completed a transfer
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* @node: node for desc_got and desc_freed
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* @done_cookie: cookie after the DMAC completed a transfer
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* @sg: information for the transfer
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*/
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struct usb_dmac_desc {
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struct virt_dma_desc vd;
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enum dma_transfer_direction direction;
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unsigned int sg_allocated_len;
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unsigned int sg_len;
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unsigned int sg_index;
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u32 residue;
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struct list_head node;
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dma_cookie_t done_cookie;
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struct usb_dmac_sg sg[];
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};
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#define to_usb_dmac_desc(vd) container_of(vd, struct usb_dmac_desc, vd)
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/*
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* struct usb_dmac_chan - USB DMA Controller Channel
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* @vc: base virtual DMA channel object
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* @iomem: channel I/O memory base
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* @index: index of this channel in the controller
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* @irq: irq number of this channel
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* @desc: the current descriptor
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* @descs_allocated: number of descriptors allocated
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* @desc_got: got descriptors
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* @desc_freed: freed descriptors after the DMAC completed a transfer
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*/
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struct usb_dmac_chan {
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struct virt_dma_chan vc;
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void __iomem *iomem;
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unsigned int index;
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int irq;
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struct usb_dmac_desc *desc;
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int descs_allocated;
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struct list_head desc_got;
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struct list_head desc_freed;
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};
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#define to_usb_dmac_chan(c) container_of(c, struct usb_dmac_chan, vc.chan)
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/*
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* struct usb_dmac - USB DMA Controller
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* @engine: base DMA engine object
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* @dev: the hardware device
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* @iomem: remapped I/O memory base
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* @n_channels: number of available channels
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* @channels: array of DMAC channels
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*/
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struct usb_dmac {
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struct dma_device engine;
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struct device *dev;
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void __iomem *iomem;
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unsigned int n_channels;
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struct usb_dmac_chan *channels;
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};
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#define to_usb_dmac(d) container_of(d, struct usb_dmac, engine)
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/* -----------------------------------------------------------------------------
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* Registers
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*/
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#define USB_DMAC_CHAN_OFFSET(i) (0x20 + 0x20 * (i))
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#define USB_DMASWR 0x0008
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#define USB_DMASWR_SWR (1 << 0)
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#define USB_DMAOR 0x0060
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#define USB_DMAOR_AE (1 << 1)
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#define USB_DMAOR_DME (1 << 0)
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#define USB_DMASAR 0x0000
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#define USB_DMADAR 0x0004
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#define USB_DMATCR 0x0008
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#define USB_DMATCR_MASK 0x00ffffff
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#define USB_DMACHCR 0x0014
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#define USB_DMACHCR_FTE (1 << 24)
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#define USB_DMACHCR_NULLE (1 << 16)
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#define USB_DMACHCR_NULL (1 << 12)
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#define USB_DMACHCR_TS_8B ((0 << 7) | (0 << 6))
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#define USB_DMACHCR_TS_16B ((0 << 7) | (1 << 6))
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#define USB_DMACHCR_TS_32B ((1 << 7) | (0 << 6))
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#define USB_DMACHCR_IE (1 << 5)
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#define USB_DMACHCR_SP (1 << 2)
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#define USB_DMACHCR_TE (1 << 1)
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#define USB_DMACHCR_DE (1 << 0)
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#define USB_DMATEND 0x0018
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/* Hardcode the xfer_shift to 5 (32bytes) */
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#define USB_DMAC_XFER_SHIFT 5
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#define USB_DMAC_XFER_SIZE (1 << USB_DMAC_XFER_SHIFT)
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#define USB_DMAC_CHCR_TS USB_DMACHCR_TS_32B
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#define USB_DMAC_SLAVE_BUSWIDTH DMA_SLAVE_BUSWIDTH_32_BYTES
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/* for descriptors */
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#define USB_DMAC_INITIAL_NR_DESC 16
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#define USB_DMAC_INITIAL_NR_SG 8
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/* -----------------------------------------------------------------------------
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* Device access
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*/
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static void usb_dmac_write(struct usb_dmac *dmac, u32 reg, u32 data)
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{
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writel(data, dmac->iomem + reg);
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}
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static u32 usb_dmac_read(struct usb_dmac *dmac, u32 reg)
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{
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return readl(dmac->iomem + reg);
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}
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static u32 usb_dmac_chan_read(struct usb_dmac_chan *chan, u32 reg)
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{
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return readl(chan->iomem + reg);
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}
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static void usb_dmac_chan_write(struct usb_dmac_chan *chan, u32 reg, u32 data)
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{
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writel(data, chan->iomem + reg);
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}
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/* -----------------------------------------------------------------------------
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* Initialization and configuration
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*/
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static bool usb_dmac_chan_is_busy(struct usb_dmac_chan *chan)
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{
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u32 chcr = usb_dmac_chan_read(chan, USB_DMACHCR);
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return (chcr & (USB_DMACHCR_DE | USB_DMACHCR_TE)) == USB_DMACHCR_DE;
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}
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static u32 usb_dmac_calc_tend(u32 size)
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{
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/*
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* Please refer to the Figure "Example of Final Transaction Valid
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* Data Transfer Enable (EDTEN) Setting" in the data sheet.
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*/
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return 0xffffffff << (32 - (size % USB_DMAC_XFER_SIZE ? :
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USB_DMAC_XFER_SIZE));
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}
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/* This function is already held by vc.lock */
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static void usb_dmac_chan_start_sg(struct usb_dmac_chan *chan,
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unsigned int index)
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{
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struct usb_dmac_desc *desc = chan->desc;
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struct usb_dmac_sg *sg = desc->sg + index;
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dma_addr_t src_addr = 0, dst_addr = 0;
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WARN_ON_ONCE(usb_dmac_chan_is_busy(chan));
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if (desc->direction == DMA_DEV_TO_MEM)
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dst_addr = sg->mem_addr;
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else
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src_addr = sg->mem_addr;
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dev_dbg(chan->vc.chan.device->dev,
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"chan%u: queue sg %p: %u@%pad -> %pad\n",
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chan->index, sg, sg->size, &src_addr, &dst_addr);
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usb_dmac_chan_write(chan, USB_DMASAR, src_addr & 0xffffffff);
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usb_dmac_chan_write(chan, USB_DMADAR, dst_addr & 0xffffffff);
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usb_dmac_chan_write(chan, USB_DMATCR,
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DIV_ROUND_UP(sg->size, USB_DMAC_XFER_SIZE));
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usb_dmac_chan_write(chan, USB_DMATEND, usb_dmac_calc_tend(sg->size));
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usb_dmac_chan_write(chan, USB_DMACHCR, USB_DMAC_CHCR_TS |
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USB_DMACHCR_NULLE | USB_DMACHCR_IE | USB_DMACHCR_DE);
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}
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/* This function is already held by vc.lock */
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static void usb_dmac_chan_start_desc(struct usb_dmac_chan *chan)
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{
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struct virt_dma_desc *vd;
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vd = vchan_next_desc(&chan->vc);
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if (!vd) {
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chan->desc = NULL;
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return;
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}
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/*
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* Remove this request from vc->desc_issued. Otherwise, this driver
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* will get the previous value from vchan_next_desc() after a transfer
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* was completed.
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*/
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list_del(&vd->node);
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chan->desc = to_usb_dmac_desc(vd);
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chan->desc->sg_index = 0;
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usb_dmac_chan_start_sg(chan, 0);
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}
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static int usb_dmac_init(struct usb_dmac *dmac)
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{
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u16 dmaor;
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/* Clear all channels and enable the DMAC globally. */
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usb_dmac_write(dmac, USB_DMAOR, USB_DMAOR_DME);
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dmaor = usb_dmac_read(dmac, USB_DMAOR);
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if ((dmaor & (USB_DMAOR_AE | USB_DMAOR_DME)) != USB_DMAOR_DME) {
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dev_warn(dmac->dev, "DMAOR initialization failed.\n");
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return -EIO;
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}
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* Descriptors allocation and free
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*/
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static int usb_dmac_desc_alloc(struct usb_dmac_chan *chan, unsigned int sg_len,
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gfp_t gfp)
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{
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struct usb_dmac_desc *desc;
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unsigned long flags;
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desc = kzalloc(struct_size(desc, sg, sg_len), gfp);
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if (!desc)
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return -ENOMEM;
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desc->sg_allocated_len = sg_len;
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INIT_LIST_HEAD(&desc->node);
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spin_lock_irqsave(&chan->vc.lock, flags);
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list_add_tail(&desc->node, &chan->desc_freed);
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spin_unlock_irqrestore(&chan->vc.lock, flags);
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return 0;
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}
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static void usb_dmac_desc_free(struct usb_dmac_chan *chan)
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{
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struct usb_dmac_desc *desc, *_desc;
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LIST_HEAD(list);
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list_splice_init(&chan->desc_freed, &list);
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list_splice_init(&chan->desc_got, &list);
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list_for_each_entry_safe(desc, _desc, &list, node) {
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list_del(&desc->node);
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kfree(desc);
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}
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chan->descs_allocated = 0;
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}
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static struct usb_dmac_desc *usb_dmac_desc_get(struct usb_dmac_chan *chan,
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unsigned int sg_len, gfp_t gfp)
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{
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struct usb_dmac_desc *desc = NULL;
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unsigned long flags;
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/* Get a freed descritpor */
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spin_lock_irqsave(&chan->vc.lock, flags);
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list_for_each_entry(desc, &chan->desc_freed, node) {
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if (sg_len <= desc->sg_allocated_len) {
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list_move_tail(&desc->node, &chan->desc_got);
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spin_unlock_irqrestore(&chan->vc.lock, flags);
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return desc;
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}
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}
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spin_unlock_irqrestore(&chan->vc.lock, flags);
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/* Allocate a new descriptor */
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if (!usb_dmac_desc_alloc(chan, sg_len, gfp)) {
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/* If allocated the desc, it was added to tail of the list */
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spin_lock_irqsave(&chan->vc.lock, flags);
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desc = list_last_entry(&chan->desc_freed, struct usb_dmac_desc,
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node);
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list_move_tail(&desc->node, &chan->desc_got);
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spin_unlock_irqrestore(&chan->vc.lock, flags);
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return desc;
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}
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return NULL;
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}
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static void usb_dmac_desc_put(struct usb_dmac_chan *chan,
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struct usb_dmac_desc *desc)
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{
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unsigned long flags;
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spin_lock_irqsave(&chan->vc.lock, flags);
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list_move_tail(&desc->node, &chan->desc_freed);
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spin_unlock_irqrestore(&chan->vc.lock, flags);
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}
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/* -----------------------------------------------------------------------------
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* Stop and reset
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*/
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static void usb_dmac_soft_reset(struct usb_dmac_chan *uchan)
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{
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struct dma_chan *chan = &uchan->vc.chan;
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struct usb_dmac *dmac = to_usb_dmac(chan->device);
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int i;
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/* Don't issue soft reset if any one of channels is busy */
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for (i = 0; i < dmac->n_channels; ++i) {
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if (usb_dmac_chan_is_busy(uchan))
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return;
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}
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usb_dmac_write(dmac, USB_DMAOR, 0);
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usb_dmac_write(dmac, USB_DMASWR, USB_DMASWR_SWR);
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udelay(100);
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usb_dmac_write(dmac, USB_DMASWR, 0);
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usb_dmac_write(dmac, USB_DMAOR, 1);
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}
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static void usb_dmac_chan_halt(struct usb_dmac_chan *chan)
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{
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u32 chcr = usb_dmac_chan_read(chan, USB_DMACHCR);
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chcr &= ~(USB_DMACHCR_IE | USB_DMACHCR_TE | USB_DMACHCR_DE);
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usb_dmac_chan_write(chan, USB_DMACHCR, chcr);
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usb_dmac_soft_reset(chan);
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}
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static void usb_dmac_stop(struct usb_dmac *dmac)
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{
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usb_dmac_write(dmac, USB_DMAOR, 0);
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}
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/* -----------------------------------------------------------------------------
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* DMA engine operations
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*/
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static int usb_dmac_alloc_chan_resources(struct dma_chan *chan)
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{
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struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
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int ret;
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while (uchan->descs_allocated < USB_DMAC_INITIAL_NR_DESC) {
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ret = usb_dmac_desc_alloc(uchan, USB_DMAC_INITIAL_NR_SG,
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GFP_KERNEL);
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if (ret < 0) {
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usb_dmac_desc_free(uchan);
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return ret;
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}
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uchan->descs_allocated++;
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}
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return pm_runtime_get_sync(chan->device->dev);
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}
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static void usb_dmac_free_chan_resources(struct dma_chan *chan)
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{
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struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
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unsigned long flags;
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/* Protect against ISR */
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spin_lock_irqsave(&uchan->vc.lock, flags);
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usb_dmac_chan_halt(uchan);
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spin_unlock_irqrestore(&uchan->vc.lock, flags);
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usb_dmac_desc_free(uchan);
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vchan_free_chan_resources(&uchan->vc);
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pm_runtime_put(chan->device->dev);
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}
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static struct dma_async_tx_descriptor *
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usb_dmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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unsigned int sg_len, enum dma_transfer_direction dir,
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unsigned long dma_flags, void *context)
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{
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struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
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struct usb_dmac_desc *desc;
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struct scatterlist *sg;
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int i;
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if (!sg_len) {
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dev_warn(chan->device->dev,
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"%s: bad parameter: len=%d\n", __func__, sg_len);
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return NULL;
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}
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desc = usb_dmac_desc_get(uchan, sg_len, GFP_NOWAIT);
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if (!desc)
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return NULL;
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desc->direction = dir;
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desc->sg_len = sg_len;
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for_each_sg(sgl, sg, sg_len, i) {
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desc->sg[i].mem_addr = sg_dma_address(sg);
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desc->sg[i].size = sg_dma_len(sg);
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}
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return vchan_tx_prep(&uchan->vc, &desc->vd, dma_flags);
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}
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static int usb_dmac_chan_terminate_all(struct dma_chan *chan)
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{
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struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
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struct usb_dmac_desc *desc, *_desc;
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unsigned long flags;
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LIST_HEAD(head);
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LIST_HEAD(list);
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spin_lock_irqsave(&uchan->vc.lock, flags);
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usb_dmac_chan_halt(uchan);
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vchan_get_all_descriptors(&uchan->vc, &head);
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if (uchan->desc)
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uchan->desc = NULL;
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list_splice_init(&uchan->desc_got, &list);
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list_for_each_entry_safe(desc, _desc, &list, node)
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list_move_tail(&desc->node, &uchan->desc_freed);
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spin_unlock_irqrestore(&uchan->vc.lock, flags);
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vchan_dma_desc_free_list(&uchan->vc, &head);
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return 0;
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}
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static unsigned int usb_dmac_get_current_residue(struct usb_dmac_chan *chan,
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struct usb_dmac_desc *desc,
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unsigned int sg_index)
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{
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struct usb_dmac_sg *sg = desc->sg + sg_index;
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u32 mem_addr = sg->mem_addr & 0xffffffff;
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unsigned int residue = sg->size;
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/*
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* We cannot use USB_DMATCR to calculate residue because USB_DMATCR
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* has unsuited value to calculate.
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*/
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if (desc->direction == DMA_DEV_TO_MEM)
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residue -= usb_dmac_chan_read(chan, USB_DMADAR) - mem_addr;
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else
|
|
residue -= usb_dmac_chan_read(chan, USB_DMASAR) - mem_addr;
|
|
|
|
return residue;
|
|
}
|
|
|
|
static u32 usb_dmac_chan_get_residue_if_complete(struct usb_dmac_chan *chan,
|
|
dma_cookie_t cookie)
|
|
{
|
|
struct usb_dmac_desc *desc;
|
|
u32 residue = 0;
|
|
|
|
list_for_each_entry_reverse(desc, &chan->desc_freed, node) {
|
|
if (desc->done_cookie == cookie) {
|
|
residue = desc->residue;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return residue;
|
|
}
|
|
|
|
static u32 usb_dmac_chan_get_residue(struct usb_dmac_chan *chan,
|
|
dma_cookie_t cookie)
|
|
{
|
|
u32 residue = 0;
|
|
struct virt_dma_desc *vd;
|
|
struct usb_dmac_desc *desc = chan->desc;
|
|
int i;
|
|
|
|
if (!desc) {
|
|
vd = vchan_find_desc(&chan->vc, cookie);
|
|
if (!vd)
|
|
return 0;
|
|
desc = to_usb_dmac_desc(vd);
|
|
}
|
|
|
|
/* Compute the size of all usb_dmac_sg still to be transferred */
|
|
for (i = desc->sg_index + 1; i < desc->sg_len; i++)
|
|
residue += desc->sg[i].size;
|
|
|
|
/* Add the residue for the current sg */
|
|
residue += usb_dmac_get_current_residue(chan, desc, desc->sg_index);
|
|
|
|
return residue;
|
|
}
|
|
|
|
static enum dma_status usb_dmac_tx_status(struct dma_chan *chan,
|
|
dma_cookie_t cookie,
|
|
struct dma_tx_state *txstate)
|
|
{
|
|
struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
|
|
enum dma_status status;
|
|
unsigned int residue = 0;
|
|
unsigned long flags;
|
|
|
|
status = dma_cookie_status(chan, cookie, txstate);
|
|
/* a client driver will get residue after DMA_COMPLETE */
|
|
if (!txstate)
|
|
return status;
|
|
|
|
spin_lock_irqsave(&uchan->vc.lock, flags);
|
|
if (status == DMA_COMPLETE)
|
|
residue = usb_dmac_chan_get_residue_if_complete(uchan, cookie);
|
|
else
|
|
residue = usb_dmac_chan_get_residue(uchan, cookie);
|
|
spin_unlock_irqrestore(&uchan->vc.lock, flags);
|
|
|
|
dma_set_residue(txstate, residue);
|
|
|
|
return status;
|
|
}
|
|
|
|
static void usb_dmac_issue_pending(struct dma_chan *chan)
|
|
{
|
|
struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&uchan->vc.lock, flags);
|
|
if (vchan_issue_pending(&uchan->vc) && !uchan->desc)
|
|
usb_dmac_chan_start_desc(uchan);
|
|
spin_unlock_irqrestore(&uchan->vc.lock, flags);
|
|
}
|
|
|
|
static void usb_dmac_virt_desc_free(struct virt_dma_desc *vd)
|
|
{
|
|
struct usb_dmac_desc *desc = to_usb_dmac_desc(vd);
|
|
struct usb_dmac_chan *chan = to_usb_dmac_chan(vd->tx.chan);
|
|
|
|
usb_dmac_desc_put(chan, desc);
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* IRQ handling
|
|
*/
|
|
|
|
static void usb_dmac_isr_transfer_end(struct usb_dmac_chan *chan)
|
|
{
|
|
struct usb_dmac_desc *desc = chan->desc;
|
|
|
|
BUG_ON(!desc);
|
|
|
|
if (++desc->sg_index < desc->sg_len) {
|
|
usb_dmac_chan_start_sg(chan, desc->sg_index);
|
|
} else {
|
|
desc->residue = usb_dmac_get_current_residue(chan, desc,
|
|
desc->sg_index - 1);
|
|
desc->done_cookie = desc->vd.tx.cookie;
|
|
desc->vd.tx_result.result = DMA_TRANS_NOERROR;
|
|
desc->vd.tx_result.residue = desc->residue;
|
|
vchan_cookie_complete(&desc->vd);
|
|
|
|
/* Restart the next transfer if this driver has a next desc */
|
|
usb_dmac_chan_start_desc(chan);
|
|
}
|
|
}
|
|
|
|
static irqreturn_t usb_dmac_isr_channel(int irq, void *dev)
|
|
{
|
|
struct usb_dmac_chan *chan = dev;
|
|
irqreturn_t ret = IRQ_NONE;
|
|
u32 mask = 0;
|
|
u32 chcr;
|
|
bool xfer_end = false;
|
|
|
|
spin_lock(&chan->vc.lock);
|
|
|
|
chcr = usb_dmac_chan_read(chan, USB_DMACHCR);
|
|
if (chcr & (USB_DMACHCR_TE | USB_DMACHCR_SP)) {
|
|
mask |= USB_DMACHCR_DE | USB_DMACHCR_TE | USB_DMACHCR_SP;
|
|
if (chcr & USB_DMACHCR_DE)
|
|
xfer_end = true;
|
|
ret |= IRQ_HANDLED;
|
|
}
|
|
if (chcr & USB_DMACHCR_NULL) {
|
|
/* An interruption of TE will happen after we set FTE */
|
|
mask |= USB_DMACHCR_NULL;
|
|
chcr |= USB_DMACHCR_FTE;
|
|
ret |= IRQ_HANDLED;
|
|
}
|
|
if (mask)
|
|
usb_dmac_chan_write(chan, USB_DMACHCR, chcr & ~mask);
|
|
|
|
if (xfer_end)
|
|
usb_dmac_isr_transfer_end(chan);
|
|
|
|
spin_unlock(&chan->vc.lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* OF xlate and channel filter
|
|
*/
|
|
|
|
static bool usb_dmac_chan_filter(struct dma_chan *chan, void *arg)
|
|
{
|
|
struct usb_dmac_chan *uchan = to_usb_dmac_chan(chan);
|
|
struct of_phandle_args *dma_spec = arg;
|
|
|
|
/* USB-DMAC should be used with fixed usb controller's FIFO */
|
|
if (uchan->index != dma_spec->args[0])
|
|
return false;
|
|
|
|
return true;
|
|
}
|
|
|
|
static struct dma_chan *usb_dmac_of_xlate(struct of_phandle_args *dma_spec,
|
|
struct of_dma *ofdma)
|
|
{
|
|
struct dma_chan *chan;
|
|
dma_cap_mask_t mask;
|
|
|
|
if (dma_spec->args_count != 1)
|
|
return NULL;
|
|
|
|
/* Only slave DMA channels can be allocated via DT */
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_SLAVE, mask);
|
|
|
|
chan = __dma_request_channel(&mask, usb_dmac_chan_filter, dma_spec,
|
|
ofdma->of_node);
|
|
if (!chan)
|
|
return NULL;
|
|
|
|
return chan;
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Power management
|
|
*/
|
|
|
|
#ifdef CONFIG_PM
|
|
static int usb_dmac_runtime_suspend(struct device *dev)
|
|
{
|
|
struct usb_dmac *dmac = dev_get_drvdata(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < dmac->n_channels; ++i) {
|
|
if (!dmac->channels[i].iomem)
|
|
break;
|
|
usb_dmac_chan_halt(&dmac->channels[i]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usb_dmac_runtime_resume(struct device *dev)
|
|
{
|
|
struct usb_dmac *dmac = dev_get_drvdata(dev);
|
|
|
|
return usb_dmac_init(dmac);
|
|
}
|
|
#endif /* CONFIG_PM */
|
|
|
|
static const struct dev_pm_ops usb_dmac_pm = {
|
|
SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
SET_RUNTIME_PM_OPS(usb_dmac_runtime_suspend, usb_dmac_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Probe and remove
|
|
*/
|
|
|
|
static int usb_dmac_chan_probe(struct usb_dmac *dmac,
|
|
struct usb_dmac_chan *uchan,
|
|
unsigned int index)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dmac->dev);
|
|
char pdev_irqname[5];
|
|
char *irqname;
|
|
int ret;
|
|
|
|
uchan->index = index;
|
|
uchan->iomem = dmac->iomem + USB_DMAC_CHAN_OFFSET(index);
|
|
|
|
/* Request the channel interrupt. */
|
|
sprintf(pdev_irqname, "ch%u", index);
|
|
uchan->irq = platform_get_irq_byname(pdev, pdev_irqname);
|
|
if (uchan->irq < 0)
|
|
return -ENODEV;
|
|
|
|
irqname = devm_kasprintf(dmac->dev, GFP_KERNEL, "%s:%u",
|
|
dev_name(dmac->dev), index);
|
|
if (!irqname)
|
|
return -ENOMEM;
|
|
|
|
ret = devm_request_irq(dmac->dev, uchan->irq, usb_dmac_isr_channel,
|
|
IRQF_SHARED, irqname, uchan);
|
|
if (ret) {
|
|
dev_err(dmac->dev, "failed to request IRQ %u (%d)\n",
|
|
uchan->irq, ret);
|
|
return ret;
|
|
}
|
|
|
|
uchan->vc.desc_free = usb_dmac_virt_desc_free;
|
|
vchan_init(&uchan->vc, &dmac->engine);
|
|
INIT_LIST_HEAD(&uchan->desc_freed);
|
|
INIT_LIST_HEAD(&uchan->desc_got);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usb_dmac_parse_of(struct device *dev, struct usb_dmac *dmac)
|
|
{
|
|
struct device_node *np = dev->of_node;
|
|
int ret;
|
|
|
|
ret = of_property_read_u32(np, "dma-channels", &dmac->n_channels);
|
|
if (ret < 0) {
|
|
dev_err(dev, "unable to read dma-channels property\n");
|
|
return ret;
|
|
}
|
|
|
|
if (dmac->n_channels <= 0 || dmac->n_channels >= 100) {
|
|
dev_err(dev, "invalid number of channels %u\n",
|
|
dmac->n_channels);
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usb_dmac_probe(struct platform_device *pdev)
|
|
{
|
|
const enum dma_slave_buswidth widths = USB_DMAC_SLAVE_BUSWIDTH;
|
|
struct dma_device *engine;
|
|
struct usb_dmac *dmac;
|
|
struct resource *mem;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL);
|
|
if (!dmac)
|
|
return -ENOMEM;
|
|
|
|
dmac->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, dmac);
|
|
|
|
ret = usb_dmac_parse_of(&pdev->dev, dmac);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
|
|
sizeof(*dmac->channels), GFP_KERNEL);
|
|
if (!dmac->channels)
|
|
return -ENOMEM;
|
|
|
|
/* Request resources. */
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
dmac->iomem = devm_ioremap_resource(&pdev->dev, mem);
|
|
if (IS_ERR(dmac->iomem))
|
|
return PTR_ERR(dmac->iomem);
|
|
|
|
/* Enable runtime PM and initialize the device. */
|
|
pm_runtime_enable(&pdev->dev);
|
|
ret = pm_runtime_get_sync(&pdev->dev);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "runtime PM get sync failed (%d)\n", ret);
|
|
goto error_pm;
|
|
}
|
|
|
|
ret = usb_dmac_init(dmac);
|
|
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to reset device\n");
|
|
goto error;
|
|
}
|
|
|
|
/* Initialize the channels. */
|
|
INIT_LIST_HEAD(&dmac->engine.channels);
|
|
|
|
for (i = 0; i < dmac->n_channels; ++i) {
|
|
ret = usb_dmac_chan_probe(dmac, &dmac->channels[i], i);
|
|
if (ret < 0)
|
|
goto error;
|
|
}
|
|
|
|
/* Register the DMAC as a DMA provider for DT. */
|
|
ret = of_dma_controller_register(pdev->dev.of_node, usb_dmac_of_xlate,
|
|
NULL);
|
|
if (ret < 0)
|
|
goto error;
|
|
|
|
/*
|
|
* Register the DMA engine device.
|
|
*
|
|
* Default transfer size of 32 bytes requires 32-byte alignment.
|
|
*/
|
|
engine = &dmac->engine;
|
|
dma_cap_set(DMA_SLAVE, engine->cap_mask);
|
|
|
|
engine->dev = &pdev->dev;
|
|
|
|
engine->src_addr_widths = widths;
|
|
engine->dst_addr_widths = widths;
|
|
engine->directions = BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM);
|
|
engine->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
|
|
|
|
engine->device_alloc_chan_resources = usb_dmac_alloc_chan_resources;
|
|
engine->device_free_chan_resources = usb_dmac_free_chan_resources;
|
|
engine->device_prep_slave_sg = usb_dmac_prep_slave_sg;
|
|
engine->device_terminate_all = usb_dmac_chan_terminate_all;
|
|
engine->device_tx_status = usb_dmac_tx_status;
|
|
engine->device_issue_pending = usb_dmac_issue_pending;
|
|
|
|
ret = dma_async_device_register(engine);
|
|
if (ret < 0)
|
|
goto error;
|
|
|
|
pm_runtime_put(&pdev->dev);
|
|
return 0;
|
|
|
|
error:
|
|
of_dma_controller_free(pdev->dev.of_node);
|
|
error_pm:
|
|
pm_runtime_put(&pdev->dev);
|
|
pm_runtime_disable(&pdev->dev);
|
|
return ret;
|
|
}
|
|
|
|
static void usb_dmac_chan_remove(struct usb_dmac *dmac,
|
|
struct usb_dmac_chan *uchan)
|
|
{
|
|
usb_dmac_chan_halt(uchan);
|
|
devm_free_irq(dmac->dev, uchan->irq, uchan);
|
|
}
|
|
|
|
static int usb_dmac_remove(struct platform_device *pdev)
|
|
{
|
|
struct usb_dmac *dmac = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
for (i = 0; i < dmac->n_channels; ++i)
|
|
usb_dmac_chan_remove(dmac, &dmac->channels[i]);
|
|
of_dma_controller_free(pdev->dev.of_node);
|
|
dma_async_device_unregister(&dmac->engine);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void usb_dmac_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct usb_dmac *dmac = platform_get_drvdata(pdev);
|
|
|
|
usb_dmac_stop(dmac);
|
|
}
|
|
|
|
static const struct of_device_id usb_dmac_of_ids[] = {
|
|
{ .compatible = "renesas,usb-dmac", },
|
|
{ /* Sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, usb_dmac_of_ids);
|
|
|
|
static struct platform_driver usb_dmac_driver = {
|
|
.driver = {
|
|
.pm = &usb_dmac_pm,
|
|
.name = "usb-dmac",
|
|
.of_match_table = usb_dmac_of_ids,
|
|
},
|
|
.probe = usb_dmac_probe,
|
|
.remove = usb_dmac_remove,
|
|
.shutdown = usb_dmac_shutdown,
|
|
};
|
|
|
|
module_platform_driver(usb_dmac_driver);
|
|
|
|
MODULE_DESCRIPTION("Renesas USB DMA Controller Driver");
|
|
MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
|
|
MODULE_LICENSE("GPL v2");
|