Kunihiko Hayashi 4fc97ef94b pinctrl: uniphier: add UART hardware flow control pin-mux settings ... UniPhier SoCs have the following pins for hardware flow control of UART: XRTS, XCTS and for modem control of UART: XDTR, XDSR, XDCD, XRI The port number with the flow control is SoC-dependent. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		2018-03-27 15:14:43 +02:00
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Kconfig	pinctrl: uniphier: add UniPhier PXs3 pinctrl driver	2017-08-14 15:01:00 +02:00
Makefile	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
pinctrl-uniphier-core.c	pinctrl: uniphier: refactor drive strength get/set functions	2018-01-11 10:40:23 +01:00
pinctrl-uniphier-ld4.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-ld6b.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-ld11.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-ld20.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-pro4.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-pro5.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-pxs2.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-pxs3.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier-sld8.c	pinctrl: uniphier: add UART hardware flow control pin-mux settings	2018-03-27 15:14:43 +02:00
pinctrl-uniphier.h	pinctrl: uniphier: include <linux/build_bug.h> instead of <linux/bug.h>	2017-09-12 11:18:17 +02:00