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7f06472f1c
There was only chip enable and readdy/busy pins for the nand controller. This add the rest of the pins. pinctrl_nand_16bits contains the specific muxes for 16 bits NANDs. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
609 lines
15 KiB
Plaintext
609 lines
15 KiB
Plaintext
/*
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* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
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* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
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* AT91SAM9X25, AT91SAM9X35 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9x5 family SoC";
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compatible = "atmel,at91sam9x5";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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ssc0 = &ssc0;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <31>;
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};
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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};
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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interrupts = <1 4 7>;
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 4 0>;
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 4 0>;
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};
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dma0: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <20 4 0>;
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};
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dma1: dma-controller@ffffee00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffee00 0x200>;
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interrupts = <21 4 0>;
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<0 9 0x1 0x0 /* PA9 periph A */
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0 10 0x1 0x1>; /* PA10 periph A with pullup */
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<0 0 0x1 0x1 /* PA0 periph A with pullup */
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0 1 0x1 0x0>; /* PA1 periph A */
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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atmel,pins =
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<0 2 0x1 0x0>; /* PA2 periph A */
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<0 3 0x1 0x0>; /* PA3 periph A */
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};
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pinctrl_usart0_sck: usart0_sck-0 {
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atmel,pins =
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<0 4 0x1 0x0>; /* PA4 periph A */
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};
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};
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<0 5 0x1 0x1 /* PA5 periph A with pullup */
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0 6 0x1 0x0>; /* PA6 periph A */
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<2 27 0x3 0x0>; /* PC27 periph C */
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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atmel,pins =
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<2 28 0x3 0x0>; /* PC28 periph C */
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};
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pinctrl_usart1_sck: usart1_sck-0 {
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atmel,pins =
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<2 28 0x3 0x0>; /* PC29 periph C */
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};
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};
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<0 7 0x1 0x1 /* PA7 periph A with pullup */
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0 8 0x1 0x0>; /* PA8 periph A */
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};
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pinctrl_uart2_rts: uart2_rts-0 {
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atmel,pins =
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<1 0 0x2 0x0>; /* PB0 periph B */
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};
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pinctrl_uart2_cts: uart2_cts-0 {
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atmel,pins =
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<1 1 0x2 0x0>; /* PB1 periph B */
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};
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pinctrl_usart2_sck: usart2_sck-0 {
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atmel,pins =
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<1 2 0x2 0x0>; /* PB2 periph B */
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};
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};
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<2 22 0x2 0x1 /* PC22 periph B with pullup */
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2 23 0x2 0x0>; /* PC23 periph B */
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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atmel,pins =
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<2 24 0x2 0x0>; /* PC24 periph B */
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};
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pinctrl_usart3_cts: usart3_cts-0 {
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atmel,pins =
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<2 25 0x2 0x0>; /* PC25 periph B */
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};
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pinctrl_usart3_sck: usart3_sck-0 {
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atmel,pins =
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<2 26 0x2 0x0>; /* PC26 periph B */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<2 8 0x3 0x0 /* PC8 periph C */
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2 9 0x3 0x1>; /* PC9 periph C with pullup */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<2 16 0x3 0x0 /* PC16 periph C */
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2 17 0x3 0x1>; /* PC17 periph C with pullup */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<3 0 0x1 0x0 /* PD0 periph A Read Enable */
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3 1 0x1 0x0 /* PD1 periph A Write Enable */
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3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
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3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
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3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
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3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
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3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
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3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
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3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
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3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
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3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
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3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
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3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
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3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
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};
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pinctrl_nand_16bits: nand_16bits-0 {
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atmel,pins =
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<3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
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3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
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3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
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3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
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3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
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3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
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3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
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3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
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};
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};
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macb0 {
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pinctrl_macb0_rmii: macb0_rmii-0 {
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atmel,pins =
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<1 0 0x1 0x0 /* PB0 periph A */
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1 1 0x1 0x0 /* PB1 periph A */
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1 2 0x1 0x0 /* PB2 periph A */
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1 3 0x1 0x0 /* PB3 periph A */
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1 4 0x1 0x0 /* PB4 periph A */
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1 5 0x1 0x0 /* PB5 periph A */
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1 6 0x1 0x0 /* PB6 periph A */
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1 7 0x1 0x0 /* PB7 periph A */
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1 9 0x1 0x0 /* PB9 periph A */
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1 10 0x1 0x0>; /* PB10 periph A */
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};
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pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
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atmel,pins =
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<1 8 0x1 0x0 /* PB8 periph A */
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1 11 0x1 0x0 /* PB11 periph A */
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1 12 0x1 0x0 /* PB12 periph A */
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1 13 0x1 0x0 /* PB13 periph A */
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1 14 0x1 0x0 /* PB14 periph A */
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1 15 0x1 0x0 /* PB15 periph A */
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1 16 0x1 0x0 /* PB16 periph A */
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1 17 0x1 0x0>; /* PB17 periph A */
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};
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};
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mmc0 {
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pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
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atmel,pins =
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<0 17 0x1 0x0 /* PA17 periph A */
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0 16 0x1 0x1 /* PA16 periph A with pullup */
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0 15 0x1 0x1>; /* PA15 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<0 18 0x1 0x1 /* PA18 periph A with pullup */
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0 19 0x1 0x1 /* PA19 periph A with pullup */
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0 20 0x1 0x1>; /* PA20 periph A with pullup */
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};
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};
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mmc1 {
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pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
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atmel,pins =
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<0 13 0x2 0x0 /* PA13 periph B */
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0 12 0x2 0x1 /* PA12 periph B with pullup */
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0 11 0x2 0x1>; /* PA11 periph B with pullup */
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};
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pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
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atmel,pins =
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<0 2 0x2 0x1 /* PA2 periph B with pullup */
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0 3 0x2 0x1 /* PA3 periph B with pullup */
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0 4 0x2 0x1>; /* PA4 periph B with pullup */
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<0 24 0x2 0x0 /* PA24 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0>; /* PA26 periph B */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<0 27 0x2 0x0 /* PA27 periph B */
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0 28 0x2 0x0 /* PA28 periph B */
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0 29 0x2 0x0>; /* PA29 periph B */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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#gpio-lines = <19>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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#gpio-lines = <22>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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ssc0: ssc@f0010000 {
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compatible = "atmel,at91sam9g45-ssc";
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reg = <0xf0010000 0x4000>;
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interrupts = <28 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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mmc0: mmc@f0008000 {
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compatible = "atmel,hsmci";
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reg = <0xf0008000 0x600>;
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interrupts = <12 4 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mmc1: mmc@f000c000 {
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compatible = "atmel,hsmci";
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reg = <0xf000c000 0x600>;
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interrupts = <26 4 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x200>;
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interrupts = <5 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart0>;
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x200>;
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interrupts = <6 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart1>;
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status = "disabled";
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};
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usart2: serial@f8024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x200>;
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interrupts = <7 4 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2>;
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status = "disabled";
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};
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macb0: ethernet@f802c000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf802c000 0x100>;
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interrupts = <24 4 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_macb0_rmii>;
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status = "disabled";
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};
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macb1: ethernet@f8030000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xf8030000 0x100>;
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interrupts = <27 4 3>;
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status = "disabled";
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};
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i2c0: i2c@f8010000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8010000 0x100>;
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interrupts = <9 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@f8014000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8014000 0x100>;
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interrupts = <10 4 6>;
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#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@f8018000 {
|
|
compatible = "atmel,at91sam9x5-i2c";
|
|
reg = <0xf8018000 0x100>;
|
|
interrupts = <11 4 6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc0: adc@f804c000 {
|
|
compatible = "atmel,at91sam9260-adc";
|
|
reg = <0xf804c000 0x100>;
|
|
interrupts = <19 4 0>;
|
|
atmel,adc-use-external;
|
|
atmel,adc-channels-used = <0xffff>;
|
|
atmel,adc-vref = <3300>;
|
|
atmel,adc-num-channels = <12>;
|
|
atmel,adc-startup-time = <40>;
|
|
atmel,adc-channel-base = <0x50>;
|
|
atmel,adc-drdy-mask = <0x1000000>;
|
|
atmel,adc-status-register = <0x30>;
|
|
atmel,adc-trigger-register = <0xc0>;
|
|
|
|
trigger@0 {
|
|
trigger-name = "external-rising";
|
|
trigger-value = <0x1>;
|
|
trigger-external;
|
|
};
|
|
|
|
trigger@1 {
|
|
trigger-name = "external-falling";
|
|
trigger-value = <0x2>;
|
|
trigger-external;
|
|
};
|
|
|
|
trigger@2 {
|
|
trigger-name = "external-any";
|
|
trigger-value = <0x3>;
|
|
trigger-external;
|
|
};
|
|
|
|
trigger@3 {
|
|
trigger-name = "continuous";
|
|
trigger-value = <0x6>;
|
|
};
|
|
};
|
|
};
|
|
|
|
nand0: nand@40000000 {
|
|
compatible = "atmel,at91rm9200-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x40000000 0x10000000
|
|
0xffffe000 0x600 /* PMECC Registers */
|
|
0xffffe600 0x200 /* PMECC Error Location Registers */
|
|
0x00108000 0x18000 /* PMECC looup table in ROM code */
|
|
>;
|
|
atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
|
|
atmel,nand-addr-offset = <21>;
|
|
atmel,nand-cmd-offset = <22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
gpios = <&pioD 5 0
|
|
&pioD 4 0
|
|
0
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: ohci@00600000 {
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
reg = <0x00600000 0x100000>;
|
|
interrupts = <22 4 2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: ehci@00700000 {
|
|
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
|
reg = <0x00700000 0x100000>;
|
|
interrupts = <22 4 2>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2c@0 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioA 30 0 /* sda */
|
|
&pioA 31 0 /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@1 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioC 0 0 /* sda */
|
|
&pioC 1 0 /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@2 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioB 4 0 /* sda */
|
|
&pioB 5 0 /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|