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d6365d0f0a
In cases where both rx and tx lrck are synced to the same source, the resets for rx and tx need to be triggered simultaneously, according to the downstream driver. As there is no reset API to atomically bulk (de)assert two resets at once, what the driver did was implement half a reset controller specific to Rockchip, which tried to write the registers for the resets within one write ideally or several writes within an irqsave section. This of course violates abstractions quite badly. The driver should not write to the CRU's registers directly. In practice, for the cases I tested the driver with, which is audio playback, replacing the synchronised asserts with just individual ones does not seem to make any difference. If it turns out that this breaks something in the future, it should be fixed through the specification and implementation of an atomic bulk reset API, not with a CRU hack. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Message-Id: <20211016105354.116513-2-frattaroli.nicolas@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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ac97 | ||
aoa | ||
arm | ||
atmel | ||
core | ||
drivers | ||
firewire | ||
hda | ||
i2c | ||
isa | ||
mips | ||
oss | ||
parisc | ||
pci | ||
pcmcia | ||
ppc | ||
sh | ||
soc | ||
sparc | ||
spi | ||
synth | ||
usb | ||
virtio | ||
x86 | ||
xen | ||
ac97_bus.c | ||
Kconfig | ||
last.c | ||
Makefile | ||
sound_core.c |