Palmer Dabbelt 580253b518 Merge patch series "RISC-V: Probe for misaligned access speed" ... Evan Green <evan@rivosinc.com> says: The current setting for the hwprobe bit indicating misaligned access speed is controlled by a vendor-specific feature probe function. This is essentially a per-SoC table we have to maintain on behalf of each vendor going forward. Let's convert that instead to something we detect at runtime. We have two assembly routines at the heart of our probe: one that does a bunch of word-sized accesses (without aligning its input buffer), and the other that does byte accesses. If we can move a larger number of bytes using misaligned word accesses than we can with the same amount of time doing byte accesses, then we can declare misaligned accesses as "fast". The tradeoff of reducing this maintenance burden is boot time. We spend 4-6 jiffies per core doing this measurement (0-2 on jiffie edge alignment, and 4 on measurement). The timing loop was based on raid6_choose_gen(), which uses (16+1)*N jiffies (where N is the number of algorithms). By taking only the fastest iteration out of all attempts for use in the comparison, variance between runs is very low. On my THead C906, it looks like this: [ 0.047563] cpu0: Ratio of byte access time to unaligned word access is 4.34, unaligned accesses are fast Several others have chimed in with results on slow machines with the older algorithm, which took all runs into account, including noise like interrupts. Even with this variation, results indicate that in all cases (fast, slow, and emulated) the measured numbers are nowhere near each other (always multiple factors away). * b4-shazam-merge: RISC-V: alternative: Remove feature_probe_func RISC-V: Probe for unaligned access speed Link: https://lore.kernel.org/r/20230818194136.4084400-1-evan@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-09-08 11:24:12 -07:00
..
acpi.rst	RISC-V: Document the ISA string parsing rules for ACPI	2023-07-06 10:25:17 -07:00
boot-image-header.rst	Documentation: riscv: Update boot image header since EFI stub is supported	2023-08-18 11:04:05 -06:00
boot.rst	Documentation: riscv: Add early boot document	2023-08-18 11:04:05 -06:00
features.rst	docs: archis: add a per-architecture features list	2020-12-03 15:10:15 -07:00
hwprobe.rst	Merge patch series "RISC-V: Probe for misaligned access speed"	2023-09-08 11:24:12 -07:00
index.rst	Documentation: riscv: Add early boot document	2023-08-18 11:04:05 -06:00
patch-acceptance.rst	Documentation: RISC-V: patch-acceptance: mention patchwork's role	2023-06-14 07:44:11 -07:00
uabi.rst	Documentation: riscv: fix insufficient list item indent	2023-02-14 16:00:02 -08:00
vector.rst	Documentation: Fix typos	2023-08-18 11:29:03 -06:00
vm-layout.rst	RISC-V: mm: Document mmap changes	2023-08-23 14:54:15 -07:00