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Document the Sparx5 ethernet serdes phy driver bindings. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210218161451.3489955-2-steen.hegelund@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
101 lines
2.4 KiB
YAML
101 lines
2.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Sparx5 Serdes controller
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maintainers:
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- Steen Hegelund <steen.hegelund@microchip.com>
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description: |
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The Sparx5 SERDES interfaces share the same basic functionality, but
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support different operating modes and line rates.
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The following list lists the SERDES features:
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* RX Adaptive Decision Feedback Equalizer (DFE)
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* Programmable continuous time linear equalizer (CTLE)
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* Rx variable gain control
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* Rx built-in fault detector (loss-of-lock/loss-of-signal)
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* Adjustable tx de-emphasis (FFE)
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* Tx output amplitude control
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* Supports rx eye monitor
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* Multiple loopback modes
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* Prbs generator and checker
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* Polarity inversion control
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SERDES6G:
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The SERDES6G is a high-speed SERDES interface, which can operate at
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the following data rates:
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* 100 Mbps (100BASE-FX)
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* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
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* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
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SERDES10G
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The SERDES10G is a high-speed SERDES interface, which can operate at
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the following data rates:
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* 100 Mbps (100BASE-FX)
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* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
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* 5 Gbps (QSGMII/USGMII)
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* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
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* 10 Gbps (10G-USGMII)
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* 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
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SERDES25G
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The SERDES25G is a high-speed SERDES interface, which can operate at
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the following data rates:
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* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
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* 5 Gbps (QSGMII/USGMII)
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* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
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* 10 Gbps (10G-USGMII)
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* 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
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* 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
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properties:
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$nodename:
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pattern: "^serdes@[0-9a-f]+$"
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compatible:
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const: microchip,sparx5-serdes
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reg:
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minItems: 1
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'#phy-cells':
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const: 1
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description: |
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- The main serdes input port
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- '#phy-cells'
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- clocks
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additionalProperties: false
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examples:
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- |
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serdes: serdes@10808000 {
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compatible = "microchip,sparx5-serdes";
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#phy-cells = <1>;
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clocks = <&sys_clk>;
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reg = <0x10808000 0x5d0000>;
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};
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...
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