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c63fef4c43
The H616 has four PHYs as the H3, along with their respective clock gates and resets, so the property description is identical. However the PHYs itself need some special bits, so we need a new compatible string for it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210519104152.21119-9-andre.przywara@arm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
142 lines
3.5 KiB
YAML
142 lines
3.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner H3 USB PHY Device Tree Bindings
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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properties:
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"#phy-cells":
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const: 1
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compatible:
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enum:
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- allwinner,sun8i-h3-usb-phy
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- allwinner,sun50i-h616-usb-phy
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reg:
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items:
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- description: PHY Control registers
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- description: PHY PMU0 registers
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- description: PHY PMU1 registers
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- description: PHY PMU2 registers
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- description: PHY PMU3 registers
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reg-names:
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items:
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- const: phy_ctrl
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- const: pmu0
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- const: pmu1
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- const: pmu2
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- const: pmu3
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clocks:
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items:
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- description: USB OTG PHY bus clock
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- description: USB Host 0 PHY bus clock
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- description: USB Host 1 PHY bus clock
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- description: USB Host 2 PHY bus clock
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clock-names:
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items:
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- const: usb0_phy
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- const: usb1_phy
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- const: usb2_phy
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- const: usb3_phy
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resets:
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items:
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- description: USB OTG reset
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- description: USB Host 1 Controller reset
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- description: USB Host 2 Controller reset
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- description: USB Host 3 Controller reset
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reset-names:
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items:
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- const: usb0_reset
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- const: usb1_reset
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- const: usb2_reset
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- const: usb3_reset
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usb0_id_det-gpios:
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maxItems: 1
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description: GPIO to the USB OTG ID pin
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usb0_vbus_det-gpios:
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maxItems: 1
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description: GPIO to the USB OTG VBUS detect pin
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usb0_vbus_power-supply:
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description: Power supply to detect the USB OTG VBUS
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usb0_vbus-supply:
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description: Regulator controlling USB OTG VBUS
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usb1_vbus-supply:
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description: Regulator controlling USB1 Host controller
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usb2_vbus-supply:
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description: Regulator controlling USB2 Host controller
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usb3_vbus-supply:
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description: Regulator controlling USB3 Host controller
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required:
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- "#phy-cells"
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- compatible
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- clocks
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- clock-names
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- reg
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- reg-names
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- resets
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- reset-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/sun8i-h3-ccu.h>
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#include <dt-bindings/reset/sun8i-h3-ccu.h>
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phy@1c19400 {
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#phy-cells = <1>;
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compatible = "allwinner,sun8i-h3-usb-phy";
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reg = <0x01c19400 0x2c>,
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<0x01c1a800 0x4>,
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<0x01c1b800 0x4>,
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<0x01c1c800 0x4>,
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<0x01c1d800 0x4>;
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reg-names = "phy_ctrl",
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"pmu0",
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"pmu1",
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"pmu2",
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"pmu3";
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clocks = <&ccu CLK_USB_PHY0>,
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<&ccu CLK_USB_PHY1>,
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<&ccu CLK_USB_PHY2>,
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<&ccu CLK_USB_PHY3>;
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clock-names = "usb0_phy",
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"usb1_phy",
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"usb2_phy",
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"usb3_phy";
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resets = <&ccu RST_USB_PHY0>,
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<&ccu RST_USB_PHY1>,
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<&ccu RST_USB_PHY2>,
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<&ccu RST_USB_PHY3>;
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reset-names = "usb0_reset",
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"usb1_reset",
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"usb2_reset",
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"usb3_reset";
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usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
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usb0_vbus-supply = <®_usb0_vbus>;
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usb1_vbus-supply = <®_usb1_vbus>;
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usb2_vbus-supply = <®_usb2_vbus>;
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usb3_vbus-supply = <®_usb3_vbus>;
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};
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