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dfc1ebe766
Both platforms had some initial device tree support, but this adds much more to actually make it usable. This is where the really nasty conflicts in the samsung platform start, due to some files getting moved around and combined in the 'restart' branch that has already gone into mainline through Russell's tree. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUATwtUpWCrR//JCVInAQI7bhAA1Q8MXyQ3EwLKMWX2p0vmbb29Nugoq0Y3 u9pBlCqiz0zw/jccPWASCgVgMVYguZLuhvMRCO8Q1D4l3ljcTt7qhtN6lBAESz2N OTTaNU2T84Um2Watm7VAQrnLcJMhxd/wFV06lmE62SgxwIVzyqxo4sr3KB3S5Qyj W3q5wRLuc5pC293HkWSNpLj3nfcKFF2oHOFpEAC5AS/C5S38Eu/T9y4FSUGvoTq4 u7xlZT11uZUTRfvkRQUTOXkh9I0Fk0JuwUpUkqhgvM4jD0Ehs60/702CX4mPAoVd +BFUI23QNSof6O04rUxEzOSt1ZNg4Le+pQZ3vUcOvi539Npq+VgzDU+yo7uzNtYv c22VJihvS9GY2s7ynmmCE6Rgw17B3VOMMy1cBbQEET2V2GwgU9lQLx2eR/bUrOGq ewcTCqgFFWVugsGsn0wM0BiPZAJ+FddXon3w3X09BM0v5a6O6q0aUAQiJnGqDgUE ZLHhYRoL87r2TU6J+3iutK3sDHQrvHkGAZdXX3H5hVWdfLWqnwGgLjT/NpBeUaWc g6nut7pFgVDCD4q4JUCa99XykgKGWRtSHAuHmJQsdZ24PzpXmse3etVZTCYwr7t6 BM3zrozoecQbGTRwZKGb9poOKd7g7xJ7125770GqYgTeX+BnBcA2lIEDAkEKsLBR GaxJggw32Q0= =XY2N -----END PGP SIGNATURE----- Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Device tree conversions for samsung and tegra Both platforms had some initial device tree support, but this adds much more to actually make it usable. * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits) ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN ARM: EXYNOS: Add Exynos4 device tree enabled board file rtc: rtc-s3c: Add device tree support input: samsung-keypad: Add device tree support ARM: S5PV210: Modify platform data for pl330 driver ARM: S5PC100: Modify platform data for pl330 driver ARM: S5P64x0: Modify platform data for pl330 driver ARM: EXYNOS: Add a alias for pdma clocks ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers DMA: PL330: Add device tree support ARM: EXYNOS: Modify platform data for pl330 driver DMA: PL330: Infer transfer direction from transfer request instead of platform data DMA: PL330: move filter function into driver serial: samsung: Fix build for non-Exynos4210 devices serial: samsung: add device tree support serial: samsung: merge probe() function from all SoC specific extensions serial: samsung: merge all SoC specific port reset functions ARM: SAMSUNG: register uart clocks to clock lookup list serial: samsung: remove all uses of get_clksrc and set_clksrc ... Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and drivers/tty/serial/Kconfig both due to just adding code close to changes.
207 lines
4.7 KiB
C
207 lines
4.7 KiB
C
/* linux/arch/arm/mach-s3c2410/s3c2410.c
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*
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* Copyright (c) 2003-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* http://www.simtec.co.uk/products/EB2410ITX/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/syscore_ops.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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#include <plat/s3c2410.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/pll.h>
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#include <plat/pm.h>
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#include <plat/watchdog-reset.h>
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#include <plat/gpio-cfg-helpers.h>
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/* Initial IO mappings */
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static struct map_desc s3c2410_iodesc[] __initdata = {
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IODESC_ENT(CLKPWR),
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IODESC_ENT(TIMER),
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IODESC_ENT(WATCHDOG),
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};
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/* our uart devices */
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/* uart registration process */
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void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
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}
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/* s3c2410_map_io
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*
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* register the standard cpu IO areas, and any passed in from the
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* machine specific initialisation.
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*/
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void __init s3c2410_map_io(void)
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{
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s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
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s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
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iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
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}
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void __init_or_cpufreq s3c2410_setup_clocks(void)
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{
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struct clk *xtal_clk;
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unsigned long tmp;
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unsigned long xtal;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
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tmp = __raw_readl(S3C2410_CLKDIVN);
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/* work out clock scalings */
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hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
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pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
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/* print brieft summary of clocks, etc */
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printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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/* initialise the clocks here, to allow other things like the
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* console to use them
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*/
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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/* fake ARMCLK for use with cpufreq, etc. */
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static struct clk s3c2410_armclk = {
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.name = "armclk",
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.parent = &clk_f,
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.id = -1,
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};
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static struct clk_lookup s3c2410_clk_lookup[] = {
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CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
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CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
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};
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void __init s3c2410_init_clocks(int xtal)
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{
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s3c24xx_register_baseclocks(xtal);
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s3c2410_setup_clocks();
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s3c2410_baseclk_add();
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s3c24xx_register_clock(&s3c2410_armclk);
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clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
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}
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struct bus_type s3c2410_subsys = {
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.name = "s3c2410-core",
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.dev_name = "s3c2410-core",
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};
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/* Note, we would have liked to name this s3c2410-core, but we cannot
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* register two subsystems with the same name.
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*/
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struct bus_type s3c2410a_subsys = {
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.name = "s3c2410a-core",
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.dev_name = "s3c2410a-core",
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};
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static struct device s3c2410_dev = {
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.bus = &s3c2410_subsys,
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};
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/* need to register the subsystem before we actually register the device, and
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* we also need to ensure that it has been initialised before any of the
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* drivers even try to use it (even if not on an s3c2410 based system)
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* as a driver which may support both 2410 and 2440 may try and use it.
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*/
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static int __init s3c2410_core_init(void)
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{
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return subsys_system_register(&s3c2410_subsys, NULL);
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}
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core_initcall(s3c2410_core_init);
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static int __init s3c2410a_core_init(void)
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{
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return subsys_system_register(&s3c2410a_subsys, NULL);
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}
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core_initcall(s3c2410a_core_init);
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int __init s3c2410_init(void)
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{
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printk("S3C2410: Initialising architecture\n");
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#ifdef CONFIG_PM
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register_syscore_ops(&s3c2410_pm_syscore_ops);
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#endif
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register_syscore_ops(&s3c24xx_irq_syscore_ops);
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return device_register(&s3c2410_dev);
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}
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int __init s3c2410a_init(void)
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{
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s3c2410_dev.bus = &s3c2410a_subsys;
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return s3c2410_init();
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}
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void s3c2410_restart(char mode, const char *cmd)
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{
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if (mode == 's') {
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soft_restart(0);
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}
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arch_wdt_reset();
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/* we'll take a jump through zero as a poor second */
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soft_restart(0);
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}
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