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d303633648
The default PHY configuration disables most of the LEDs. The following configures the ethernet activity LEDs as Netgear intended. [gregory.clement@free-electrons.com: fix commit title] Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
252 lines
4.5 KiB
Plaintext
252 lines
4.5 KiB
Plaintext
/*
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* Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "orion5x-mv88f5181.dtsi"
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/ {
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model = "Netgear WNR854-t";
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compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
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"marvell,orion5x";
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aliases {
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serial0 = &uart0;
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};
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memory {
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reg = <0x00000000 0x2000000>; /* 32 MB */
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
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<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
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<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&pmx_reset_button>;
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pinctrl-names = "default";
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reset {
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label = "Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
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pinctrl-names = "default";
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led@0 {
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label = "wnr854t:green:power";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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};
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led@1 {
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label = "wnr854t:blink:power";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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};
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led@2 {
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label = "wnr854t:green:wan";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&devbus_bootcs {
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status = "okay";
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devbus,keep-config;
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flash@0 {
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compatible = "cfi-flash";
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reg = <0 0x800000>;
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bank-width = <2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x100000>;
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};
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partition@100000 {
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label = "rootfs";
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reg = <0x100000 0x660000>;
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};
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partition@760000 {
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label = "uboot_env";
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reg = <0x760000 0x20000>;
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};
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partition@780000 {
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label = "uboot";
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reg = <0x780000 0x80000>;
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read-only;
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};
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};
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};
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};
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&mdio {
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status = "okay";
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switch: switch@0 {
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compatible = "marvell,mv88e6085";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan3";
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phy-handle = <&lan3phy>;
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};
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port@1 {
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reg = <1>;
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label = "lan4";
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phy-handle = <&lan4phy>;
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};
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port@2 {
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reg = <2>;
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label = "wan";
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phy-handle = <&wanphy>;
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};
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port@3 {
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reg = <3>;
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label = "cpu";
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ethernet = <ðport>;
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};
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port@5 {
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reg = <5>;
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label = "lan1";
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phy-handle = <&lan1phy>;
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};
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port@7 {
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reg = <7>;
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label = "lan2";
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phy-handle = <&lan2phy>;
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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lan3phy: ethernet-phy@0 {
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/* Marvell 88E1121R (port 1) */
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compatible = "ethernet-phy-id0141.0cb0",
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"ethernet-phy-ieee802.3-c22";
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reg = <0>;
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marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
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};
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lan4phy: ethernet-phy@1 {
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/* Marvell 88E1121R (port 2) */
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compatible = "ethernet-phy-id0141.0cb0",
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"ethernet-phy-ieee802.3-c22";
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reg = <1>;
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marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
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};
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wanphy: ethernet-phy@2 {
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/* Marvell 88E1121R (port 1) */
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compatible = "ethernet-phy-id0141.0cb0",
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"ethernet-phy-ieee802.3-c22";
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reg = <2>;
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marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
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};
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lan1phy: ethernet-phy@5 {
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/* Marvell 88E1112 */
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compatible = "ethernet-phy-id0141.0cb0",
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"ethernet-phy-ieee802.3-c22";
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reg = <5>;
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marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
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};
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lan2phy: ethernet-phy@7 {
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/* Marvell 88E1112 */
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compatible = "ethernet-phy-id0141.0cb0",
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"ethernet-phy-ieee802.3-c22";
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reg = <7>;
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marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
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};
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};
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};
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};
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ð {
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status = "okay";
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ethernet-port@0 {
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/* Hardwired to DSA switch */
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speed = <1000>;
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duplex = <1>;
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};
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};
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&pinctrl {
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pinctrl-0 = <&pmx_pci_gpios>;
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pinctrl-names = "default";
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pmx_power_led: pmx-power-led {
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marvell,pins = "mpp0";
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marvell,function = "gpio";
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};
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pmx_reset_button: pmx-reset-button {
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marvell,pins = "mpp1";
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marvell,function = "gpio";
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};
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pmx_power_led_blink: pmx-power-led-blink {
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marvell,pins = "mpp2";
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marvell,function = "gpio";
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};
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pmx_wan_led: pmx-wan-led {
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marvell,pins = "mpp3";
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marvell,function = "gpio";
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};
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pmx_pci_gpios: pmx-pci-gpios {
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marvell,pins = "mpp4";
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marvell,function = "gpio";
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};
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};
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&uart0 {
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/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
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status = "okay";
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};
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