Marcel Ziswiler 4c9a27a6c6 ARM: tegra: Fix ULPI regression on Tegra20 ... Since commit f8f8f1d044 ("clk: Don't touch hardware when reparenting during registration") ULPI has been broken on Tegra20 leading to the following error message during boot: [ 1.974698] ulpi_phy_power_on: ulpi write failed [ 1.979384] tegra-ehci c5004000.usb: Failed to power on the phy [ 1.985434] tegra-ehci: probe of c5004000.usb failed with error -110 Debugging through the changes and finally also consulting the TRM revealed that rather than the CDEV2 clock off OSC requiring such pin muxing actually the PLL_P_OUT4 clock is in use. It looks like so far it just worked by chance of that one having been enabled which Stephen's commit now changed when reparenting sclk away from pll_p_out4 leaving that one disabled. Fix this by properly assigning the PLL_P_OUT4 clock as the ULPI PHY clock. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>		2018-03-08 15:12:52 +01:00
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bootp	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
compressed	ARM: 8745/1: get rid of __memzero()	2018-01-21 15:37:56 +00:00
dts	ARM: tegra: Fix ULPI regression on Tegra20	2018-03-08 15:12:52 +01:00
.gitignore	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2017-11-08 11:20:24 -06:00
deflate_xip_data.sh	ARM: XIP kernel: store .data compressed in ROM	2017-09-10 19:34:53 -04:00
install.sh
Makefile	ARM: XIP kernel: store .data compressed in ROM	2017-09-10 19:34:53 -04:00