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https://mirrors.bfsu.edu.cn/git/linux.git
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ae46654bcf
This branch contains platform-related driver updates for ARM and ARM64. Among them: - Reset driver updates: + New API for dealing with arrays of resets + Make unimplemented {de,}assert return success on shared resets + MSDKv1 driver + Removal of obsolete Gemini reset driver + Misc updates for sunxi and Uniphier - SoC drivers: + Platform SoC driver registration on Tegra + Shuffle of Qualcomm drivers into a submenu + Allwinner A64 support for SRAM + Renesas R-Car R3 support + Power domains for Rockchip RK3366 - Misc updates and smaller fixes for TEE and memory driver subsystems -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZtdt7AAoJEIwa5zzehBx3EboP/jR2T9lrMavXR1zL48L14yJb S+fiJlrX1Kr42UF4PQvsfs+uTqOLmycrPVFkMb6IwoUPzQ9UCOSoiMzYm2b7ZPvt uIesHhdM3/xun6wKfieN8GmNA1yDVynTxo0TTYDw5ha7I6s2GHgw0GSFzy3wm0Qg KzerAO3gzf3L5XsKR0cai3IXNjHO9ubpFG1ReR09da28nPElP8ggWg0KnqdO76Ch BGpFj78EC875ZNqwHgnspUqgGDJnBjig3m/uA4FWA0G9Jl38tCyKTZfUR7cEraoV kyCgBlR/UrI8eXVTyEy5k5iTsQ3A1VhX4rGjyH+5NZHTs1yWr4+RDND/qeGl9tSo VASuOtH6Rc3vdUDpHPBNAFNQH8fwwDoKf96dvN1tiffsx6LSKb//NyOfkXzKOtR6 CP5raYfX4YktLtHq0XVTZ/6r3XmLcTHzElR/dCFpQOFcTOYii0pWtfcWouahbZ1w dhoBX/dbNq37MfzrxtHN2VTIEHpn2GU7u+ZGkp2ArokD58BAft/M3Xee1cDnF75g ZDwe5eNFT8aBZKaY7zwG8cdxiw9kACAivDRwW+zgpfUr39c+d0+QmVfnfJh4EGXK Ri6yr2EfBWK6jw3cwkdSyyt7iSzIkB+RiuuD1MjpYhWzAvoDpzqkXYukFGbpXnuy vUFHNuP1ocUsRtCs8mm1 =yBzS -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "This branch contains platform-related driver updates for ARM and ARM64. Among them: - Reset driver updates: + New API for dealing with arrays of resets + Make unimplemented {de,}assert return success on shared resets + MSDKv1 driver + Removal of obsolete Gemini reset driver + Misc updates for sunxi and Uniphier - SoC drivers: + Platform SoC driver registration on Tegra + Shuffle of Qualcomm drivers into a submenu + Allwinner A64 support for SRAM + Renesas R-Car R3 support + Power domains for Rockchip RK3366 - Misc updates and smaller fixes for TEE and memory driver subsystems" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set soc/tegra: fuse: Add missing semi-colon soc/tegra: Restrict SoC device registration to Tegra drivers: soc: sunxi: add support for A64 and its SRAM C drivers: soc: sunxi: add support for remapping func value to reg value drivers: soc: sunxi: fix error processing on base address when claiming dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C bus: sunxi-rsb: Enable by default for ARM64 soc/tegra: Register SoC device firmware: tegra: set drvdata earlier memory: Convert to using %pOF instead of full_name soc: Convert to using %pOF instead of full_name bus: Convert to using %pOF instead of full_name firmware: Convert to using %pOF instead of full_name soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC soc: mediatek: add header files required for MT7622 SCPSYS dt-binding soc: mediatek: reduce code duplication of scpsys_probe across all SoCs dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC reset: uniphier: add analog amplifiers reset control reset: uniphier: add video input subsystem reset control ...
615 lines
15 KiB
C
615 lines
15 KiB
C
/*
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* EBI driver for Atmel chips
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* inspired by the fsl weim bus driver
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*
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* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/atmel-matrix.h>
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#include <linux/mfd/syscon/atmel-smc.h>
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#include <linux/init.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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struct atmel_ebi_dev_config {
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int cs;
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struct atmel_smc_cs_conf smcconf;
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};
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struct atmel_ebi;
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struct atmel_ebi_dev {
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struct list_head node;
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struct atmel_ebi *ebi;
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u32 mode;
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int numcs;
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struct atmel_ebi_dev_config configs[];
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};
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struct atmel_ebi_caps {
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unsigned int available_cs;
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unsigned int ebi_csa_offs;
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void (*get_config)(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf);
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int (*xlate_config)(struct atmel_ebi_dev *ebid,
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struct device_node *configs_np,
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struct atmel_ebi_dev_config *conf);
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void (*apply_config)(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf);
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};
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struct atmel_ebi {
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struct clk *clk;
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struct regmap *matrix;
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struct {
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struct regmap *regmap;
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struct clk *clk;
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const struct atmel_hsmc_reg_layout *layout;
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} smc;
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struct device *dev;
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const struct atmel_ebi_caps *caps;
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struct list_head devs;
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};
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struct atmel_smc_timing_xlate {
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const char *name;
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int (*converter)(struct atmel_smc_cs_conf *conf,
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unsigned int shift, unsigned int nycles);
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unsigned int shift;
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};
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#define ATMEL_SMC_SETUP_XLATE(nm, pos) \
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{ .name = nm, .converter = atmel_smc_cs_conf_set_setup, .shift = pos}
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#define ATMEL_SMC_PULSE_XLATE(nm, pos) \
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{ .name = nm, .converter = atmel_smc_cs_conf_set_pulse, .shift = pos}
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#define ATMEL_SMC_CYCLE_XLATE(nm, pos) \
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{ .name = nm, .converter = atmel_smc_cs_conf_set_cycle, .shift = pos}
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static void at91sam9_ebi_get_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_smc_cs_conf_get(ebid->ebi->smc.regmap, conf->cs,
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&conf->smcconf);
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}
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static void sama5_ebi_get_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_hsmc_cs_conf_get(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
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conf->cs, &conf->smcconf);
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}
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static const struct atmel_smc_timing_xlate timings_xlate_table[] = {
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ATMEL_SMC_SETUP_XLATE("atmel,smc-ncs-rd-setup-ns",
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ATMEL_SMC_NCS_RD_SHIFT),
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ATMEL_SMC_SETUP_XLATE("atmel,smc-ncs-wr-setup-ns",
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ATMEL_SMC_NCS_WR_SHIFT),
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ATMEL_SMC_SETUP_XLATE("atmel,smc-nrd-setup-ns", ATMEL_SMC_NRD_SHIFT),
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ATMEL_SMC_SETUP_XLATE("atmel,smc-nwe-setup-ns", ATMEL_SMC_NWE_SHIFT),
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ATMEL_SMC_PULSE_XLATE("atmel,smc-ncs-rd-pulse-ns",
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ATMEL_SMC_NCS_RD_SHIFT),
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ATMEL_SMC_PULSE_XLATE("atmel,smc-ncs-wr-pulse-ns",
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ATMEL_SMC_NCS_WR_SHIFT),
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ATMEL_SMC_PULSE_XLATE("atmel,smc-nrd-pulse-ns", ATMEL_SMC_NRD_SHIFT),
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ATMEL_SMC_PULSE_XLATE("atmel,smc-nwe-pulse-ns", ATMEL_SMC_NWE_SHIFT),
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ATMEL_SMC_CYCLE_XLATE("atmel,smc-nrd-cycle-ns", ATMEL_SMC_NRD_SHIFT),
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ATMEL_SMC_CYCLE_XLATE("atmel,smc-nwe-cycle-ns", ATMEL_SMC_NWE_SHIFT),
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};
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static int atmel_ebi_xslate_smc_timings(struct atmel_ebi_dev *ebid,
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struct device_node *np,
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struct atmel_smc_cs_conf *smcconf)
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{
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unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
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unsigned int clk_period_ns = NSEC_PER_SEC / clk_rate;
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bool required = false;
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unsigned int ncycles;
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int ret, i;
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u32 val;
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ret = of_property_read_u32(np, "atmel,smc-tdf-ns", &val);
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if (!ret) {
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required = true;
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ncycles = DIV_ROUND_UP(val, clk_period_ns);
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if (ncycles > ATMEL_SMC_MODE_TDF_MAX) {
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ret = -EINVAL;
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goto out;
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}
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if (ncycles < ATMEL_SMC_MODE_TDF_MIN)
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ncycles = ATMEL_SMC_MODE_TDF_MIN;
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smcconf->mode |= ATMEL_SMC_MODE_TDF(ncycles);
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}
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for (i = 0; i < ARRAY_SIZE(timings_xlate_table); i++) {
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const struct atmel_smc_timing_xlate *xlate;
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xlate = &timings_xlate_table[i];
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ret = of_property_read_u32(np, xlate->name, &val);
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if (ret) {
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if (!required)
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continue;
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else
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break;
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}
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if (!required) {
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ret = -EINVAL;
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break;
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}
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ncycles = DIV_ROUND_UP(val, clk_period_ns);
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ret = xlate->converter(smcconf, xlate->shift, ncycles);
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if (ret)
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goto out;
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}
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out:
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if (ret) {
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dev_err(ebid->ebi->dev,
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"missing or invalid timings definition in %pOF",
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np);
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return ret;
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}
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return required;
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}
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static int atmel_ebi_xslate_smc_config(struct atmel_ebi_dev *ebid,
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struct device_node *np,
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struct atmel_ebi_dev_config *conf)
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{
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struct atmel_smc_cs_conf *smcconf = &conf->smcconf;
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bool required = false;
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const char *tmp_str;
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u32 tmp;
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int ret;
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ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
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if (!ret) {
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switch (tmp) {
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case 8:
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smcconf->mode |= ATMEL_SMC_MODE_DBW_8;
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break;
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case 16:
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smcconf->mode |= ATMEL_SMC_MODE_DBW_16;
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break;
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case 32:
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smcconf->mode |= ATMEL_SMC_MODE_DBW_32;
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break;
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default:
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return -EINVAL;
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}
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required = true;
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}
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if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
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smcconf->mode |= ATMEL_SMC_MODE_TDFMODE_OPTIMIZED;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "write")) {
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smcconf->mode |= ATMEL_SMC_MODE_BAT_WRITE;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "nrd")) {
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smcconf->mode |= ATMEL_SMC_MODE_READMODE_NRD;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
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if (tmp_str && !strcmp(tmp_str, "nwe")) {
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smcconf->mode |= ATMEL_SMC_MODE_WRITEMODE_NWE;
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required = true;
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}
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tmp_str = NULL;
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of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
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if (tmp_str) {
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if (!strcmp(tmp_str, "frozen"))
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smcconf->mode |= ATMEL_SMC_MODE_EXNWMODE_FROZEN;
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else if (!strcmp(tmp_str, "ready"))
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smcconf->mode |= ATMEL_SMC_MODE_EXNWMODE_READY;
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else if (strcmp(tmp_str, "disabled"))
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return -EINVAL;
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required = true;
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}
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ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
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if (!ret) {
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switch (tmp) {
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case 4:
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smcconf->mode |= ATMEL_SMC_MODE_PS_4;
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break;
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case 8:
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smcconf->mode |= ATMEL_SMC_MODE_PS_8;
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break;
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case 16:
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smcconf->mode |= ATMEL_SMC_MODE_PS_16;
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break;
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case 32:
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smcconf->mode |= ATMEL_SMC_MODE_PS_32;
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break;
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default:
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return -EINVAL;
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}
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smcconf->mode |= ATMEL_SMC_MODE_PMEN;
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required = true;
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}
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ret = atmel_ebi_xslate_smc_timings(ebid, np, &conf->smcconf);
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if (ret < 0)
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return -EINVAL;
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if ((ret > 0 && !required) || (!ret && required)) {
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dev_err(ebid->ebi->dev, "missing atmel,smc- properties in %pOF",
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np);
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return -EINVAL;
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}
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return required;
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}
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static void at91sam9_ebi_apply_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_smc_cs_conf_apply(ebid->ebi->smc.regmap, conf->cs,
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&conf->smcconf);
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}
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static void sama5_ebi_apply_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_hsmc_cs_conf_apply(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
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conf->cs, &conf->smcconf);
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}
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static int atmel_ebi_dev_setup(struct atmel_ebi *ebi, struct device_node *np,
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int reg_cells)
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{
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const struct atmel_ebi_caps *caps = ebi->caps;
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struct atmel_ebi_dev_config conf = { };
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struct device *dev = ebi->dev;
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struct atmel_ebi_dev *ebid;
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unsigned long cslines = 0;
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int ret, numcs = 0, nentries, i;
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bool apply = false;
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u32 cs;
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nentries = of_property_count_elems_of_size(np, "reg",
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reg_cells * sizeof(u32));
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for (i = 0; i < nentries; i++) {
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ret = of_property_read_u32_index(np, "reg", i * reg_cells,
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&cs);
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if (ret)
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return ret;
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if (cs >= AT91_MATRIX_EBI_NUM_CS ||
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!(ebi->caps->available_cs & BIT(cs))) {
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dev_err(dev, "invalid reg property in %pOF\n", np);
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return -EINVAL;
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}
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if (!test_and_set_bit(cs, &cslines))
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numcs++;
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}
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if (!numcs) {
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dev_err(dev, "invalid reg property in %pOF\n", np);
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return -EINVAL;
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}
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ebid = devm_kzalloc(ebi->dev,
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sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
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GFP_KERNEL);
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if (!ebid)
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return -ENOMEM;
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ebid->ebi = ebi;
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ebid->numcs = numcs;
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ret = caps->xlate_config(ebid, np, &conf);
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if (ret < 0)
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return ret;
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else if (ret)
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apply = true;
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i = 0;
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for_each_set_bit(cs, &cslines, AT91_MATRIX_EBI_NUM_CS) {
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ebid->configs[i].cs = cs;
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if (apply) {
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conf.cs = cs;
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caps->apply_config(ebid, &conf);
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}
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caps->get_config(ebid, &ebid->configs[i]);
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/*
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* Attach the EBI device to the generic SMC logic if at least
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* one "atmel,smc-" property is present.
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*/
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if (ebi->caps->ebi_csa_offs && apply)
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regmap_update_bits(ebi->matrix,
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ebi->caps->ebi_csa_offs,
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BIT(cs), 0);
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i++;
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}
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list_add_tail(&ebid->node, &ebi->devs);
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return 0;
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}
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static const struct atmel_ebi_caps at91sam9260_ebi_caps = {
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.available_cs = 0xff,
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.ebi_csa_offs = AT91SAM9260_MATRIX_EBICSA,
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.get_config = at91sam9_ebi_get_config,
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.xlate_config = atmel_ebi_xslate_smc_config,
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.apply_config = at91sam9_ebi_apply_config,
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};
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static const struct atmel_ebi_caps at91sam9261_ebi_caps = {
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.available_cs = 0xff,
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.ebi_csa_offs = AT91SAM9261_MATRIX_EBICSA,
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.get_config = at91sam9_ebi_get_config,
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.xlate_config = atmel_ebi_xslate_smc_config,
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.apply_config = at91sam9_ebi_apply_config,
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};
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static const struct atmel_ebi_caps at91sam9263_ebi0_caps = {
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.available_cs = 0x3f,
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.ebi_csa_offs = AT91SAM9263_MATRIX_EBI0CSA,
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.get_config = at91sam9_ebi_get_config,
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.xlate_config = atmel_ebi_xslate_smc_config,
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.apply_config = at91sam9_ebi_apply_config,
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};
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static const struct atmel_ebi_caps at91sam9263_ebi1_caps = {
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.available_cs = 0x7,
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.ebi_csa_offs = AT91SAM9263_MATRIX_EBI1CSA,
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.get_config = at91sam9_ebi_get_config,
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.xlate_config = atmel_ebi_xslate_smc_config,
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.apply_config = at91sam9_ebi_apply_config,
|
|
};
|
|
|
|
static const struct atmel_ebi_caps at91sam9rl_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa_offs = AT91SAM9RL_MATRIX_EBICSA,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = atmel_ebi_xslate_smc_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
};
|
|
|
|
static const struct atmel_ebi_caps at91sam9g45_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa_offs = AT91SAM9G45_MATRIX_EBICSA,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = atmel_ebi_xslate_smc_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
};
|
|
|
|
static const struct atmel_ebi_caps at91sam9x5_ebi_caps = {
|
|
.available_cs = 0x3f,
|
|
.ebi_csa_offs = AT91SAM9X5_MATRIX_EBICSA,
|
|
.get_config = at91sam9_ebi_get_config,
|
|
.xlate_config = atmel_ebi_xslate_smc_config,
|
|
.apply_config = at91sam9_ebi_apply_config,
|
|
};
|
|
|
|
static const struct atmel_ebi_caps sama5d3_ebi_caps = {
|
|
.available_cs = 0xf,
|
|
.get_config = sama5_ebi_get_config,
|
|
.xlate_config = atmel_ebi_xslate_smc_config,
|
|
.apply_config = sama5_ebi_apply_config,
|
|
};
|
|
|
|
static const struct of_device_id atmel_ebi_id_table[] = {
|
|
{
|
|
.compatible = "atmel,at91sam9260-ebi",
|
|
.data = &at91sam9260_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9261-ebi",
|
|
.data = &at91sam9261_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9263-ebi0",
|
|
.data = &at91sam9263_ebi0_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9263-ebi1",
|
|
.data = &at91sam9263_ebi1_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9rl-ebi",
|
|
.data = &at91sam9rl_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9g45-ebi",
|
|
.data = &at91sam9g45_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,at91sam9x5-ebi",
|
|
.data = &at91sam9x5_ebi_caps,
|
|
},
|
|
{
|
|
.compatible = "atmel,sama5d3-ebi",
|
|
.data = &sama5d3_ebi_caps,
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int atmel_ebi_dev_disable(struct atmel_ebi *ebi, struct device_node *np)
|
|
{
|
|
struct device *dev = ebi->dev;
|
|
struct property *newprop;
|
|
|
|
newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
|
|
if (!newprop)
|
|
return -ENOMEM;
|
|
|
|
newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
|
|
if (!newprop->name)
|
|
return -ENOMEM;
|
|
|
|
newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
|
|
if (!newprop->value)
|
|
return -ENOMEM;
|
|
|
|
newprop->length = sizeof("disabled");
|
|
|
|
return of_update_property(np, newprop);
|
|
}
|
|
|
|
static int atmel_ebi_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *child, *np = dev->of_node, *smc_np;
|
|
const struct of_device_id *match;
|
|
struct atmel_ebi *ebi;
|
|
int ret, reg_cells;
|
|
struct clk *clk;
|
|
u32 val;
|
|
|
|
match = of_match_device(atmel_ebi_id_table, dev);
|
|
if (!match || !match->data)
|
|
return -EINVAL;
|
|
|
|
ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
|
|
if (!ebi)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, ebi);
|
|
|
|
INIT_LIST_HEAD(&ebi->devs);
|
|
ebi->caps = match->data;
|
|
ebi->dev = dev;
|
|
|
|
clk = devm_clk_get(dev, NULL);
|
|
if (IS_ERR(clk))
|
|
return PTR_ERR(clk);
|
|
|
|
ebi->clk = clk;
|
|
|
|
smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
|
|
|
|
ebi->smc.regmap = syscon_node_to_regmap(smc_np);
|
|
if (IS_ERR(ebi->smc.regmap))
|
|
return PTR_ERR(ebi->smc.regmap);
|
|
|
|
ebi->smc.layout = atmel_hsmc_get_reg_layout(smc_np);
|
|
if (IS_ERR(ebi->smc.layout))
|
|
return PTR_ERR(ebi->smc.layout);
|
|
|
|
ebi->smc.clk = of_clk_get(smc_np, 0);
|
|
if (IS_ERR(ebi->smc.clk)) {
|
|
if (PTR_ERR(ebi->smc.clk) != -ENOENT)
|
|
return PTR_ERR(ebi->smc.clk);
|
|
|
|
ebi->smc.clk = NULL;
|
|
}
|
|
ret = clk_prepare_enable(ebi->smc.clk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/*
|
|
* The sama5d3 does not provide an EBICSA register and thus does need
|
|
* to access the matrix registers.
|
|
*/
|
|
if (ebi->caps->ebi_csa_offs) {
|
|
ebi->matrix =
|
|
syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
|
|
if (IS_ERR(ebi->matrix))
|
|
return PTR_ERR(ebi->matrix);
|
|
}
|
|
|
|
ret = of_property_read_u32(np, "#address-cells", &val);
|
|
if (ret) {
|
|
dev_err(dev, "missing #address-cells property\n");
|
|
return ret;
|
|
}
|
|
|
|
reg_cells = val;
|
|
|
|
ret = of_property_read_u32(np, "#size-cells", &val);
|
|
if (ret) {
|
|
dev_err(dev, "missing #address-cells property\n");
|
|
return ret;
|
|
}
|
|
|
|
reg_cells += val;
|
|
|
|
for_each_available_child_of_node(np, child) {
|
|
if (!of_find_property(child, "reg", NULL))
|
|
continue;
|
|
|
|
ret = atmel_ebi_dev_setup(ebi, child, reg_cells);
|
|
if (ret) {
|
|
dev_err(dev, "failed to configure EBI bus for %pOF, disabling the device",
|
|
child);
|
|
|
|
ret = atmel_ebi_dev_disable(ebi, child);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return of_platform_populate(np, NULL, NULL, dev);
|
|
}
|
|
|
|
static __maybe_unused int atmel_ebi_resume(struct device *dev)
|
|
{
|
|
struct atmel_ebi *ebi = dev_get_drvdata(dev);
|
|
struct atmel_ebi_dev *ebid;
|
|
|
|
list_for_each_entry(ebid, &ebi->devs, node) {
|
|
int i;
|
|
|
|
for (i = 0; i < ebid->numcs; i++)
|
|
ebid->ebi->caps->apply_config(ebid, &ebid->configs[i]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(atmel_ebi_pm_ops, NULL, atmel_ebi_resume);
|
|
|
|
static struct platform_driver atmel_ebi_driver = {
|
|
.driver = {
|
|
.name = "atmel-ebi",
|
|
.of_match_table = atmel_ebi_id_table,
|
|
.pm = &atmel_ebi_pm_ops,
|
|
},
|
|
};
|
|
builtin_platform_driver_probe(atmel_ebi_driver, atmel_ebi_probe);
|