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4a7cf90a01
Replace all the struct that contain l3 with l3_main in order to be consistent with the OMAP4 naming convention. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
186 lines
5.2 KiB
C
186 lines
5.2 KiB
C
/*
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* omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
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*
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* Copyright (C) 2009-2010 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* The data in this file should be completely autogeneratable from
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* the TI hardware database or other technical documentation.
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*
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <plat/omap_hwmod.h>
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#include <mach/irqs.h>
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#include <plat/cpu.h>
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#include <plat/dma.h>
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#include "omap_hwmod_common_data.h"
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#include "prm-regbits-34xx.h"
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/*
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* OMAP3xxx hardware module integration data
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*
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* ALl of the data in this section should be autogeneratable from the
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* TI hardware database or other technical documentation. Data that
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* is driver-specific or driver-kernel integration-specific belongs
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* elsewhere.
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*/
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static struct omap_hwmod omap3xxx_mpu_hwmod;
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static struct omap_hwmod omap3xxx_l3_main_hwmod;
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static struct omap_hwmod omap3xxx_l4_core_hwmod;
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static struct omap_hwmod omap3xxx_l4_per_hwmod;
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/* L3 -> L4_CORE interface */
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static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
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.master = &omap3xxx_l3_main_hwmod,
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.slave = &omap3xxx_l4_core_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L3 -> L4_PER interface */
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static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {
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.master = &omap3xxx_l3_main_hwmod,
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.slave = &omap3xxx_l4_per_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* MPU -> L3 interface */
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static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = {
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.master = &omap3xxx_mpu_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.user = OCP_USER_MPU,
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};
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/* Slave interfaces on the L3 interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l3_main_slaves[] = {
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&omap3xxx_mpu__l3_main,
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};
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/* Master interfaces on the L3 interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = {
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&omap3xxx_l3_main__l4_core,
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&omap3xxx_l3_main__l4_per,
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};
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/* L3 */
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static struct omap_hwmod omap3xxx_l3_main_hwmod = {
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.name = "l3_main",
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.class = &l3_hwmod_class,
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.masters = omap3xxx_l3_main_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
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.slaves = omap3xxx_l3_main_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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.flags = HWMOD_NO_IDLEST,
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};
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static struct omap_hwmod omap3xxx_l4_wkup_hwmod;
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/* L4_CORE -> L4_WKUP interface */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_l4_wkup_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* Slave interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
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&omap3xxx_l3_main__l4_core,
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};
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/* Master interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = {
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&omap3xxx_l4_core__l4_wkup,
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};
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/* L4 CORE */
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static struct omap_hwmod omap3xxx_l4_core_hwmod = {
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.name = "l4_core",
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.class = &l4_hwmod_class,
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.masters = omap3xxx_l4_core_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_l4_core_masters),
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.slaves = omap3xxx_l4_core_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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.flags = HWMOD_NO_IDLEST,
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};
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/* Slave interfaces on the L4_PER interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_per_slaves[] = {
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&omap3xxx_l3_main__l4_per,
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};
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/* Master interfaces on the L4_PER interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_per_masters[] = {
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};
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/* L4 PER */
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static struct omap_hwmod omap3xxx_l4_per_hwmod = {
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.name = "l4_per",
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.class = &l4_hwmod_class,
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.masters = omap3xxx_l4_per_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_l4_per_masters),
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.slaves = omap3xxx_l4_per_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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.flags = HWMOD_NO_IDLEST,
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};
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/* Slave interfaces on the L4_WKUP interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_slaves[] = {
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&omap3xxx_l4_core__l4_wkup,
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};
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/* Master interfaces on the L4_WKUP interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_wkup_masters[] = {
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};
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/* L4 WKUP */
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static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
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.name = "l4_wkup",
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.class = &l4_hwmod_class,
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.masters = omap3xxx_l4_wkup_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_masters),
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.slaves = omap3xxx_l4_wkup_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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.flags = HWMOD_NO_IDLEST,
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};
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/* Master interfaces on the MPU device */
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static struct omap_hwmod_ocp_if *omap3xxx_mpu_masters[] = {
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&omap3xxx_mpu__l3_main,
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};
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/* MPU */
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static struct omap_hwmod omap3xxx_mpu_hwmod = {
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.name = "mpu",
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.class = &mpu_hwmod_class,
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.main_clk = "arm_fck",
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.masters = omap3xxx_mpu_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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};
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static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
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&omap3xxx_l3_main_hwmod,
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&omap3xxx_l4_core_hwmod,
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&omap3xxx_l4_per_hwmod,
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&omap3xxx_l4_wkup_hwmod,
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&omap3xxx_mpu_hwmod,
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NULL,
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};
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int __init omap3xxx_hwmod_init(void)
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{
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return omap_hwmod_init(omap3xxx_hwmods);
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}
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