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6384fdadb4
Avoid potential naming confliction since multiple architecture will be built in a single kernel. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
92 lines
3.1 KiB
C
92 lines
3.1 KiB
C
/*
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* arch/arm/mach-pxa/include/mach/gumstix.h
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* BTRESET - Reset line to Bluetooth module, active low signal. */
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#define GPIO_GUMSTIX_BTRESET 7
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#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT)
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/*
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GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean
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interrupt signal for determining cable presence. On the gumstix F,
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this moves to GPIO17 and GPIO37. */
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/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
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has detected a cable insertion; driven low otherwise. */
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#define GPIO_GUMSTIX_USB_GPIOn 35
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#define GPIO_GUMSTIX_USB_GPIOx 41
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/* usb state change */
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#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
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#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
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#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
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#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN)
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/*
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* SD/MMC definitions
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*/
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#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
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#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
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#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
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/*
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* SMC Ethernet definitions
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* ETH_RST provides a hardware reset line to the ethernet chip
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* ETH is the IRQ line in from the ethernet chip to the PXA
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*/
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#define GPIO_GUMSTIX_ETH0_RST 80
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#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
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#define GPIO_GUMSTIX_ETH1_RST 52
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#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
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#define GPIO_GUMSTIX_ETH0 36
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#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
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#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
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#define GPIO_GUMSTIX_ETH1 27
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#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
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#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
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/* CF reset line */
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#define GPIO8_RESET 8
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/* CF slot 0 */
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#define GPIO4_nBVD1 4
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#define GPIO4_nSTSCHG GPIO4_nBVD1
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#define GPIO11_nCD 11
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#define GPIO26_PRDY_nBSY 26
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#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
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#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
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#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
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/* CF slot 1 */
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#define GPIO18_nBVD1 18
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#define GPIO18_nSTSCHG GPIO18_nBVD1
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#define GPIO36_nCD 36
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#define GPIO27_PRDY_nBSY 27
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#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
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#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
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#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
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/* CF GPIO line modes */
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#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
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#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
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#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
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#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
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#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
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#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
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#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
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/* for expansion boards that can't be programatically detected */
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extern int am200_init(void);
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extern int am300_init(void);
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