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49e19745e4
Add USB0 as otg port and USB1 as host port. Although USB0 can be used at super-speed, limit the speed to high-speed for now till SERDES PHY support is added. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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| .. | ||
| k3-am65-main.dtsi | ||
| k3-am65-mcu.dtsi | ||
| k3-am65-wakeup.dtsi | ||
| k3-am65.dtsi | ||
| k3-am654-base-board.dts | ||
| k3-am654.dtsi | ||
| k3-j721e-common-proc-board.dts | ||
| k3-j721e-main.dtsi | ||
| k3-j721e-mcu-wakeup.dtsi | ||
| k3-j721e-som-p0.dtsi | ||
| k3-j721e.dtsi | ||
| Makefile | ||