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7153d4bf0b
Define macros to list ppc interrupt types in interttupt.h, replace the reference of the trap hex values with these macros. Referred the hex numbers in arch/powerpc/kernel/exceptions-64e.S, arch/powerpc/kernel/exceptions-64s.S, arch/powerpc/kernel/head_*.S, arch/powerpc/kernel/head_booke.h and arch/powerpc/include/asm/kvm_asm.h. Signed-off-by: Xiongwei Song <sxwjean@gmail.com> [mpe: Resolve conflicts in nmi_disables_ftrace(), fix 40x build] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1618398033-13025-1-git-send-email-sxwjean@me.com
499 lines
13 KiB
C
499 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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#include <linux/context_tracking.h>
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#include <linux/err.h>
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#include <linux/compat.h>
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#include <asm/asm-prototypes.h>
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#include <asm/kup.h>
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#include <asm/cputime.h>
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#include <asm/interrupt.h>
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#include <asm/hw_irq.h>
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#include <asm/interrupt.h>
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#include <asm/kprobes.h>
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#include <asm/paca.h>
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#include <asm/ptrace.h>
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#include <asm/reg.h>
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#include <asm/signal.h>
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#include <asm/switch_to.h>
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#include <asm/syscall.h>
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#include <asm/time.h>
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#include <asm/unistd.h>
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#if defined(CONFIG_PPC_ADV_DEBUG_REGS) && defined(CONFIG_PPC32)
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unsigned long global_dbcr0[NR_CPUS];
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#endif
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typedef long (*syscall_fn)(long, long, long, long, long, long);
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/* Has to run notrace because it is entered not completely "reconciled" */
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notrace long system_call_exception(long r3, long r4, long r5,
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long r6, long r7, long r8,
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unsigned long r0, struct pt_regs *regs)
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{
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syscall_fn f;
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kuep_lock();
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#ifdef CONFIG_PPC32
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kuap_save_and_lock(regs);
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#endif
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regs->orig_gpr3 = r3;
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
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BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED);
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trace_hardirqs_off(); /* finish reconciling */
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CT_WARN_ON(ct_state() == CONTEXT_KERNEL);
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user_exit_irqoff();
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if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
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BUG_ON(!(regs->msr & MSR_RI));
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BUG_ON(!(regs->msr & MSR_PR));
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BUG_ON(arch_irq_disabled_regs(regs));
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#ifdef CONFIG_PPC_PKEY
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if (mmu_has_feature(MMU_FTR_PKEY)) {
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unsigned long amr, iamr;
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bool flush_needed = false;
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/*
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* When entering from userspace we mostly have the AMR/IAMR
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* different from kernel default values. Hence don't compare.
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*/
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amr = mfspr(SPRN_AMR);
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iamr = mfspr(SPRN_IAMR);
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regs->amr = amr;
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regs->iamr = iamr;
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if (mmu_has_feature(MMU_FTR_BOOK3S_KUAP)) {
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mtspr(SPRN_AMR, AMR_KUAP_BLOCKED);
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flush_needed = true;
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}
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if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) {
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mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED);
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flush_needed = true;
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}
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if (flush_needed)
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isync();
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} else
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#endif
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kuap_assert_locked();
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booke_restore_dbcr0();
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account_cpu_user_entry();
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account_stolen_time();
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/*
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* This is not required for the syscall exit path, but makes the
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* stack frame look nicer. If this was initialised in the first stack
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* frame, or if the unwinder was taught the first stack frame always
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* returns to user with IRQS_ENABLED, this store could be avoided!
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*/
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irq_soft_mask_regs_set_state(regs, IRQS_ENABLED);
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local_irq_enable();
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if (unlikely(current_thread_info()->flags & _TIF_SYSCALL_DOTRACE)) {
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if (unlikely(trap_is_unsupported_scv(regs))) {
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/* Unsupported scv vector */
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_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
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return regs->gpr[3];
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}
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/*
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* We use the return value of do_syscall_trace_enter() as the
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* syscall number. If the syscall was rejected for any reason
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* do_syscall_trace_enter() returns an invalid syscall number
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* and the test against NR_syscalls will fail and the return
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* value to be used is in regs->gpr[3].
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*/
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r0 = do_syscall_trace_enter(regs);
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if (unlikely(r0 >= NR_syscalls))
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return regs->gpr[3];
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r3 = regs->gpr[3];
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r4 = regs->gpr[4];
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r5 = regs->gpr[5];
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r6 = regs->gpr[6];
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r7 = regs->gpr[7];
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r8 = regs->gpr[8];
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} else if (unlikely(r0 >= NR_syscalls)) {
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if (unlikely(trap_is_unsupported_scv(regs))) {
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/* Unsupported scv vector */
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_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
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return regs->gpr[3];
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}
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return -ENOSYS;
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}
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/* May be faster to do array_index_nospec? */
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barrier_nospec();
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if (unlikely(is_compat_task())) {
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f = (void *)compat_sys_call_table[r0];
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r3 &= 0x00000000ffffffffULL;
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r4 &= 0x00000000ffffffffULL;
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r5 &= 0x00000000ffffffffULL;
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r6 &= 0x00000000ffffffffULL;
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r7 &= 0x00000000ffffffffULL;
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r8 &= 0x00000000ffffffffULL;
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} else {
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f = (void *)sys_call_table[r0];
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}
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return f(r3, r4, r5, r6, r7, r8);
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}
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/*
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* local irqs must be disabled. Returns false if the caller must re-enable
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* them, check for new work, and try again.
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*
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* This should be called with local irqs disabled, but if they were previously
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* enabled when the interrupt handler returns (indicating a process-context /
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* synchronous interrupt) then irqs_enabled should be true.
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*/
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static notrace __always_inline bool __prep_irq_for_enabled_exit(bool clear_ri)
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{
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/* This must be done with RI=1 because tracing may touch vmaps */
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trace_hardirqs_on();
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/* This pattern matches prep_irq_for_idle */
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if (clear_ri)
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__hard_EE_RI_disable();
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else
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__hard_irq_disable();
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#ifdef CONFIG_PPC64
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if (unlikely(lazy_irq_pending_nocheck())) {
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/* Took an interrupt, may have more exit work to do. */
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if (clear_ri)
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__hard_RI_enable();
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trace_hardirqs_off();
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
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return false;
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}
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local_paca->irq_happened = 0;
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irq_soft_mask_set(IRQS_ENABLED);
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#endif
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return true;
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}
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static notrace inline bool prep_irq_for_enabled_exit(bool clear_ri, bool irqs_enabled)
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{
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if (__prep_irq_for_enabled_exit(clear_ri))
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return true;
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/*
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* Must replay pending soft-masked interrupts now. Don't just
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* local_irq_enabe(); local_irq_disable(); because if we are
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* returning from an asynchronous interrupt here, another one
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* might hit after irqs are enabled, and it would exit via this
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* same path allowing another to fire, and so on unbounded.
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*
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* If interrupts were enabled when this interrupt exited,
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* indicating a process context (synchronous) interrupt,
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* local_irq_enable/disable can be used, which will enable
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* interrupts rather than keeping them masked (unclear how
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* much benefit this is over just replaying for all cases,
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* because we immediately disable again, so all we're really
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* doing is allowing hard interrupts to execute directly for
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* a very small time, rather than being masked and replayed).
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*/
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if (irqs_enabled) {
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local_irq_enable();
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local_irq_disable();
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} else {
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replay_soft_interrupts();
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}
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return false;
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}
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static notrace void booke_load_dbcr0(void)
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{
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#ifdef CONFIG_PPC_ADV_DEBUG_REGS
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unsigned long dbcr0 = current->thread.debug.dbcr0;
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if (likely(!(dbcr0 & DBCR0_IDM)))
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return;
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/*
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* Check to see if the dbcr0 register is set up to debug.
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* Use the internal debug mode bit to do this.
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*/
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mtmsr(mfmsr() & ~MSR_DE);
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if (IS_ENABLED(CONFIG_PPC32)) {
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isync();
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global_dbcr0[smp_processor_id()] = mfspr(SPRN_DBCR0);
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}
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mtspr(SPRN_DBCR0, dbcr0);
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mtspr(SPRN_DBSR, -1);
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#endif
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}
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/*
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* This should be called after a syscall returns, with r3 the return value
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* from the syscall. If this function returns non-zero, the system call
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* exit assembly should additionally load all GPR registers and CTR and XER
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* from the interrupt frame.
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*
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* The function graph tracer can not trace the return side of this function,
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* because RI=0 and soft mask state is "unreconciled", so it is marked notrace.
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*/
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notrace unsigned long syscall_exit_prepare(unsigned long r3,
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struct pt_regs *regs,
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long scv)
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{
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unsigned long ti_flags;
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unsigned long ret = 0;
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bool is_not_scv = !IS_ENABLED(CONFIG_PPC_BOOK3S_64) || !scv;
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CT_WARN_ON(ct_state() == CONTEXT_USER);
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kuap_assert_locked();
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regs->result = r3;
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/* Check whether the syscall is issued inside a restartable sequence */
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rseq_syscall(regs);
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ti_flags = current_thread_info()->flags;
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if (unlikely(r3 >= (unsigned long)-MAX_ERRNO) && is_not_scv) {
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if (likely(!(ti_flags & (_TIF_NOERROR | _TIF_RESTOREALL)))) {
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r3 = -r3;
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regs->ccr |= 0x10000000; /* Set SO bit in CR */
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}
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}
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if (unlikely(ti_flags & _TIF_PERSYSCALL_MASK)) {
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if (ti_flags & _TIF_RESTOREALL)
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ret = _TIF_RESTOREALL;
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else
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regs->gpr[3] = r3;
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clear_bits(_TIF_PERSYSCALL_MASK, ¤t_thread_info()->flags);
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} else {
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regs->gpr[3] = r3;
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}
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if (unlikely(ti_flags & _TIF_SYSCALL_DOTRACE)) {
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do_syscall_trace_leave(regs);
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ret |= _TIF_RESTOREALL;
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}
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local_irq_disable();
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again:
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ti_flags = READ_ONCE(current_thread_info()->flags);
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while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
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local_irq_enable();
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if (ti_flags & _TIF_NEED_RESCHED) {
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schedule();
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} else {
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/*
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* SIGPENDING must restore signal handler function
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* argument GPRs, and some non-volatiles (e.g., r1).
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* Restore all for now. This could be made lighter.
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*/
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if (ti_flags & _TIF_SIGPENDING)
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ret |= _TIF_RESTOREALL;
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do_notify_resume(regs, ti_flags);
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}
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local_irq_disable();
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ti_flags = READ_ONCE(current_thread_info()->flags);
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}
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if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) {
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if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
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unlikely((ti_flags & _TIF_RESTORE_TM))) {
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restore_tm_state(regs);
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} else {
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unsigned long mathflags = MSR_FP;
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if (cpu_has_feature(CPU_FTR_VSX))
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mathflags |= MSR_VEC | MSR_VSX;
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else if (cpu_has_feature(CPU_FTR_ALTIVEC))
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mathflags |= MSR_VEC;
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/*
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* If userspace MSR has all available FP bits set,
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* then they are live and no need to restore. If not,
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* it means the regs were given up and restore_math
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* may decide to restore them (to avoid taking an FP
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* fault).
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*/
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if ((regs->msr & mathflags) != mathflags)
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restore_math(regs);
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}
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}
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user_enter_irqoff();
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/* scv need not set RI=0 because SRRs are not used */
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if (unlikely(!__prep_irq_for_enabled_exit(is_not_scv))) {
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user_exit_irqoff();
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local_irq_enable();
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local_irq_disable();
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goto again;
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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local_paca->tm_scratch = regs->msr;
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#endif
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booke_load_dbcr0();
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account_cpu_user_exit();
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/* Restore user access locks last */
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kuap_user_restore(regs);
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kuep_unlock();
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return ret;
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}
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notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned long msr)
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{
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unsigned long ti_flags;
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unsigned long flags;
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unsigned long ret = 0;
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if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
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BUG_ON(!(regs->msr & MSR_RI));
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BUG_ON(!(regs->msr & MSR_PR));
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BUG_ON(arch_irq_disabled_regs(regs));
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CT_WARN_ON(ct_state() == CONTEXT_USER);
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/*
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* We don't need to restore AMR on the way back to userspace for KUAP.
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* AMR can only have been unlocked if we interrupted the kernel.
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*/
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kuap_assert_locked();
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local_irq_save(flags);
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again:
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ti_flags = READ_ONCE(current_thread_info()->flags);
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while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
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local_irq_enable(); /* returning to user: may enable */
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if (ti_flags & _TIF_NEED_RESCHED) {
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schedule();
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} else {
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if (ti_flags & _TIF_SIGPENDING)
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ret |= _TIF_RESTOREALL;
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do_notify_resume(regs, ti_flags);
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}
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local_irq_disable();
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ti_flags = READ_ONCE(current_thread_info()->flags);
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}
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if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && IS_ENABLED(CONFIG_PPC_FPU)) {
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if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
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unlikely((ti_flags & _TIF_RESTORE_TM))) {
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restore_tm_state(regs);
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} else {
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unsigned long mathflags = MSR_FP;
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if (cpu_has_feature(CPU_FTR_VSX))
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mathflags |= MSR_VEC | MSR_VSX;
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else if (cpu_has_feature(CPU_FTR_ALTIVEC))
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mathflags |= MSR_VEC;
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/* See above restore_math comment */
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if ((regs->msr & mathflags) != mathflags)
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restore_math(regs);
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}
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}
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user_enter_irqoff();
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if (unlikely(!__prep_irq_for_enabled_exit(true))) {
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user_exit_irqoff();
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local_irq_enable();
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local_irq_disable();
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goto again;
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}
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booke_load_dbcr0();
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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local_paca->tm_scratch = regs->msr;
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#endif
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account_cpu_user_exit();
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/* Restore user access locks last */
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kuap_user_restore(regs);
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return ret;
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}
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void preempt_schedule_irq(void);
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notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsigned long msr)
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{
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unsigned long flags;
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unsigned long ret = 0;
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unsigned long kuap;
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if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x) &&
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unlikely(!(regs->msr & MSR_RI)))
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unrecoverable_exception(regs);
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BUG_ON(regs->msr & MSR_PR);
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/*
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* CT_WARN_ON comes here via program_check_exception,
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* so avoid recursion.
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*/
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if (TRAP(regs) != INTERRUPT_PROGRAM)
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CT_WARN_ON(ct_state() == CONTEXT_USER);
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kuap = kuap_get_and_assert_locked();
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if (unlikely(current_thread_info()->flags & _TIF_EMULATE_STACK_STORE)) {
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clear_bits(_TIF_EMULATE_STACK_STORE, ¤t_thread_info()->flags);
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ret = 1;
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}
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local_irq_save(flags);
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if (!arch_irq_disabled_regs(regs)) {
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/* Returning to a kernel context with local irqs enabled. */
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WARN_ON_ONCE(!(regs->msr & MSR_EE));
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again:
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if (IS_ENABLED(CONFIG_PREEMPT)) {
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/* Return to preemptible kernel context */
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if (unlikely(current_thread_info()->flags & _TIF_NEED_RESCHED)) {
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if (preempt_count() == 0)
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preempt_schedule_irq();
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}
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}
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if (unlikely(!prep_irq_for_enabled_exit(true, !irqs_disabled_flags(flags))))
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goto again;
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} else {
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/* Returning to a kernel context with local irqs disabled. */
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__hard_EE_RI_disable();
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#ifdef CONFIG_PPC64
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if (regs->msr & MSR_EE)
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local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
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#endif
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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local_paca->tm_scratch = regs->msr;
|
|
#endif
|
|
|
|
/*
|
|
* 64s does not want to mfspr(SPRN_AMR) here, because this comes after
|
|
* mtmsr, which would cause Read-After-Write stalls. Hence, take the
|
|
* AMR value from the check above.
|
|
*/
|
|
kuap_kernel_restore(regs, kuap);
|
|
|
|
return ret;
|
|
}
|