Mika Kuoppala 497bfb7068 Revert "drm/i915/icl: WaEnableFloatBlendOptimization" ... The register for 0xe420 is unable to hold any value, including this bit. The documentation is also mixed between having a register bit for toggle and having a state command setup for it. Apparently the register toggle is deprecated. Remove the register toggle as evidence shows it's futile. The thing remaining is an apology and humble request for Mesa folks to resurrect their state setup for this as they were on right track from start. This reverts commit 0bf059f353. Fixes: 0bf059f353 ("drm/i915/icl: WaEnableFloatBlendOptimization") References: HSDES#1406393558 Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Anuj Phogat <anuj.phogat@gmail.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180730120636.26958-1-mika.kuoppala@linux.intel.com (cherry picked from commit c358514ba8) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>		2018-08-06 11:18:04 -07:00
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drm	Revert "drm/i915/icl: WaEnableFloatBlendOptimization"	2018-08-06 11:18:04 -07:00
host1x	gpu: host1x: Check whether size of unpin isn't 0	2018-07-09 10:31:30 +02:00
ipu-v3	gpu: ipu-csi: Check for field type alternate	2018-07-16 16:56:35 +02:00
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
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