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c600636bd5
A HW limitation was recently discovered where the last buffer in a DDP offload cannot be a full buffer size in length. Fix the issue with a work around by adding another buffer with size = 1. Signed-off-by: Amir Hanania <amir.hanania@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
845 lines
22 KiB
C
845 lines
22 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2010 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#include "ixgbe.h"
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#ifdef CONFIG_IXGBE_DCB
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#include "ixgbe_dcb_82599.h"
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#endif /* CONFIG_IXGBE_DCB */
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#include <linux/if_ether.h>
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#include <linux/gfp.h>
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#include <linux/if_vlan.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/fc/fc_fs.h>
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#include <scsi/fc/fc_fcoe.h>
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#include <scsi/libfc.h>
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#include <scsi/libfcoe.h>
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/**
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* ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
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* @rx_desc: advanced rx descriptor
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*
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* Returns : true if it is FCoE pkt
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*/
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static inline bool ixgbe_rx_is_fcoe(union ixgbe_adv_rx_desc *rx_desc)
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{
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u16 p;
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p = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info);
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if (p & IXGBE_RXDADV_PKTTYPE_ETQF) {
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p &= IXGBE_RXDADV_PKTTYPE_ETQF_MASK;
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p >>= IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT;
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return p == IXGBE_ETQF_FILTER_FCOE;
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}
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return false;
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}
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/**
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* ixgbe_fcoe_clear_ddp - clear the given ddp context
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* @ddp - ptr to the ixgbe_fcoe_ddp
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*
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* Returns : none
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*
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*/
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static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
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{
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ddp->len = 0;
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ddp->err = 1;
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ddp->udl = NULL;
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ddp->udp = 0UL;
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ddp->sgl = NULL;
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ddp->sgc = 0;
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}
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/**
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* ixgbe_fcoe_ddp_put - free the ddp context for a given xid
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* @netdev: the corresponding net_device
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* @xid: the xid that corresponding ddp will be freed
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_done
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* and it is expected to be called by ULD, i.e., FCP layer of libfc
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* to release the corresponding ddp context when the I/O is done.
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*
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* Returns : data length already ddp-ed in bytes
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*/
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int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
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{
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int len = 0;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_adapter *adapter;
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struct ixgbe_fcoe_ddp *ddp;
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u32 fcbuff;
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if (!netdev)
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goto out_ddp_put;
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if (xid >= IXGBE_FCOE_DDP_MAX)
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goto out_ddp_put;
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adapter = netdev_priv(netdev);
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (!ddp->udl)
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goto out_ddp_put;
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len = ddp->len;
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/* if there an error, force to invalidate ddp context */
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if (ddp->err) {
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spin_lock_bh(&fcoe->lock);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
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(xid | IXGBE_FCFLTRW_WE));
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_WE));
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/* guaranteed to be invalidated after 100us */
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
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(xid | IXGBE_FCDMARW_RE));
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fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
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spin_unlock_bh(&fcoe->lock);
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if (fcbuff & IXGBE_FCBUFF_VALID)
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udelay(100);
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}
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if (ddp->sgl)
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pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
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DMA_FROM_DEVICE);
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pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
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ixgbe_fcoe_clear_ddp(ddp);
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out_ddp_put:
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return len;
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}
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/**
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* ixgbe_fcoe_ddp_get - called to set up ddp context
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* @netdev: the corresponding net_device
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* @xid: the exchange id requesting ddp
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* @sgl: the scatter-gather list for this request
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* @sgc: the number of scatter-gather items
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*
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* This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
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* and is expected to be called from ULD, e.g., FCP layer of libfc
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* to set up ddp for the corresponding xid of the given sglist for
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* the corresponding I/O.
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*
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* Returns : 1 for success and 0 for no ddp
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*/
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int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
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struct scatterlist *sgl, unsigned int sgc)
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{
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struct ixgbe_adapter *adapter;
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struct ixgbe_hw *hw;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_fcoe_ddp *ddp;
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struct scatterlist *sg;
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unsigned int i, j, dmacount;
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unsigned int len;
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static const unsigned int bufflen = IXGBE_FCBUFF_MIN;
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unsigned int firstoff = 0;
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unsigned int lastsize;
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unsigned int thisoff = 0;
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unsigned int thislen = 0;
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u32 fcbuff, fcdmarw, fcfltrw;
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dma_addr_t addr = 0;
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if (!netdev || !sgl)
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return 0;
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adapter = netdev_priv(netdev);
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if (xid >= IXGBE_FCOE_DDP_MAX) {
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e_warn(drv, "xid=0x%x out-of-range\n", xid);
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return 0;
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}
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/* no DDP if we are already down or resetting */
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if (test_bit(__IXGBE_DOWN, &adapter->state) ||
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test_bit(__IXGBE_RESETTING, &adapter->state))
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return 0;
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fcoe = &adapter->fcoe;
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if (!fcoe->pool) {
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e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid);
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return 0;
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}
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ddp = &fcoe->ddp[xid];
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if (ddp->sgl) {
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e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
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xid, ddp->sgl, ddp->sgc);
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return 0;
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}
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ixgbe_fcoe_clear_ddp(ddp);
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/* setup dma from scsi command sgl */
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dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
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if (dmacount == 0) {
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e_err(drv, "xid 0x%x DMA map error\n", xid);
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return 0;
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}
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/* alloc the udl from our ddp pool */
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ddp->udl = pci_pool_alloc(fcoe->pool, GFP_ATOMIC, &ddp->udp);
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if (!ddp->udl) {
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e_err(drv, "failed allocated ddp context\n");
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goto out_noddp_unmap;
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}
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ddp->sgl = sgl;
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ddp->sgc = sgc;
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j = 0;
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for_each_sg(sgl, sg, dmacount, i) {
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addr = sg_dma_address(sg);
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len = sg_dma_len(sg);
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while (len) {
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/* max number of buffers allowed in one DDP context */
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if (j >= IXGBE_BUFFCNT_MAX) {
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e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
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"not enough descriptors\n",
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xid, i, j, dmacount, (u64)addr);
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goto out_noddp_free;
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}
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/* get the offset of length of current buffer */
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thisoff = addr & ((dma_addr_t)bufflen - 1);
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thislen = min((bufflen - thisoff), len);
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/*
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* all but the 1st buffer (j == 0)
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* must be aligned on bufflen
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*/
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if ((j != 0) && (thisoff))
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goto out_noddp_free;
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/*
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* all but the last buffer
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* ((i == (dmacount - 1)) && (thislen == len))
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* must end at bufflen
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*/
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if (((i != (dmacount - 1)) || (thislen != len))
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&& ((thislen + thisoff) != bufflen))
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goto out_noddp_free;
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ddp->udl[j] = (u64)(addr - thisoff);
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/* only the first buffer may have none-zero offset */
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if (j == 0)
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firstoff = thisoff;
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len -= thislen;
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addr += thislen;
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j++;
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}
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}
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/* only the last buffer may have non-full bufflen */
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lastsize = thisoff + thislen;
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/*
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* lastsize can not be buffer len.
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* If it is then adding another buffer with lastsize = 1.
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*/
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if (lastsize == bufflen) {
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if (j >= IXGBE_BUFFCNT_MAX) {
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e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
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"not enough user buffers. We need an extra "
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"buffer because lastsize is bufflen.\n",
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xid, i, j, dmacount, (u64)addr);
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goto out_noddp_free;
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}
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ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma);
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j++;
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lastsize = 1;
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}
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fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
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fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
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fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
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fcbuff |= (IXGBE_FCBUFF_VALID);
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fcdmarw = xid;
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fcdmarw |= IXGBE_FCDMARW_WE;
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fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
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fcfltrw = xid;
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fcfltrw |= IXGBE_FCFLTRW_WE;
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/* program DMA context */
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hw = &adapter->hw;
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spin_lock_bh(&fcoe->lock);
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
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IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
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IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
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IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
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/* program filter context */
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IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
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IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
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IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
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spin_unlock_bh(&fcoe->lock);
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return 1;
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out_noddp_free:
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pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
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ixgbe_fcoe_clear_ddp(ddp);
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out_noddp_unmap:
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pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
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return 0;
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}
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/**
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* ixgbe_fcoe_ddp - check ddp status and mark it done
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* @adapter: ixgbe adapter
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* @rx_desc: advanced rx descriptor
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* @skb: the skb holding the received data
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*
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* This checks ddp status.
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*
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* Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
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* not passing the skb to ULD, > 0 indicates is the length of data
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* being ddped.
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*/
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int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
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union ixgbe_adv_rx_desc *rx_desc,
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struct sk_buff *skb)
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{
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u16 xid;
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u32 fctl;
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u32 sterr, fceofe, fcerr, fcstat;
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int rc = -EINVAL;
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struct ixgbe_fcoe *fcoe;
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struct ixgbe_fcoe_ddp *ddp;
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struct fc_frame_header *fh;
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if (!ixgbe_rx_is_fcoe(rx_desc))
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goto ddp_out;
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sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
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fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
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fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
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if (fcerr == IXGBE_FCERR_BADCRC)
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skb_checksum_none_assert(skb);
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else
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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if (eth_hdr(skb)->h_proto == htons(ETH_P_8021Q))
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fh = (struct fc_frame_header *)(skb->data +
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sizeof(struct vlan_hdr) + sizeof(struct fcoe_hdr));
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else
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fh = (struct fc_frame_header *)(skb->data +
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sizeof(struct fcoe_hdr));
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fctl = ntoh24(fh->fh_f_ctl);
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if (fctl & FC_FC_EX_CTX)
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xid = be16_to_cpu(fh->fh_ox_id);
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else
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xid = be16_to_cpu(fh->fh_rx_id);
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if (xid >= IXGBE_FCOE_DDP_MAX)
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goto ddp_out;
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fcoe = &adapter->fcoe;
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ddp = &fcoe->ddp[xid];
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if (!ddp->udl)
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goto ddp_out;
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ddp->err = (fcerr | fceofe);
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if (ddp->err)
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goto ddp_out;
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fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
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if (fcstat) {
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/* update length of DDPed data */
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ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
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/* unmap the sg list when FCP_RSP is received */
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if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
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pci_unmap_sg(adapter->pdev, ddp->sgl,
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ddp->sgc, DMA_FROM_DEVICE);
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ddp->sgl = NULL;
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ddp->sgc = 0;
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}
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/* return 0 to bypass going to ULD for DDPed data */
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if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
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rc = 0;
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else if (ddp->len)
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rc = ddp->len;
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}
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ddp_out:
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return rc;
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}
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|
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/**
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* ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
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* @adapter: ixgbe adapter
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* @tx_ring: tx desc ring
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* @skb: associated skb
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* @tx_flags: tx flags
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* @hdr_len: hdr_len to be returned
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*
|
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* This sets up large send offload for FCoE
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*
|
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* Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
|
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*/
|
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int ixgbe_fso(struct ixgbe_adapter *adapter,
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struct ixgbe_ring *tx_ring, struct sk_buff *skb,
|
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u32 tx_flags, u8 *hdr_len)
|
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{
|
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u8 sof, eof;
|
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u32 vlan_macip_lens;
|
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u32 fcoe_sof_eof;
|
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u32 type_tucmd;
|
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u32 mss_l4len_idx;
|
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int mss = 0;
|
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unsigned int i;
|
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struct ixgbe_tx_buffer *tx_buffer_info;
|
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struct ixgbe_adv_tx_context_desc *context_desc;
|
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struct fc_frame_header *fh;
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|
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if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
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e_err(drv, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
|
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skb_shinfo(skb)->gso_type);
|
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return -EINVAL;
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}
|
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|
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/* resets the header to point fcoe/fc */
|
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skb_set_network_header(skb, skb->mac_len);
|
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skb_set_transport_header(skb, skb->mac_len +
|
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sizeof(struct fcoe_hdr));
|
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|
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/* sets up SOF and ORIS */
|
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fcoe_sof_eof = 0;
|
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sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
|
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switch (sof) {
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case FC_SOF_I2:
|
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fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
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break;
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case FC_SOF_I3:
|
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fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
|
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fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
|
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break;
|
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case FC_SOF_N2:
|
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break;
|
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case FC_SOF_N3:
|
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fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
|
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break;
|
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default:
|
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e_warn(drv, "unknown sof = 0x%x\n", sof);
|
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return -EINVAL;
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}
|
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|
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/* the first byte of the last dword is EOF */
|
|
skb_copy_bits(skb, skb->len - 4, &eof, 1);
|
|
/* sets up EOF and ORIE */
|
|
switch (eof) {
|
|
case FC_EOF_N:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
|
|
break;
|
|
case FC_EOF_T:
|
|
/* lso needs ORIE */
|
|
if (skb_is_gso(skb)) {
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIE;
|
|
} else {
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
|
|
}
|
|
break;
|
|
case FC_EOF_NI:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
|
|
break;
|
|
case FC_EOF_A:
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
|
|
break;
|
|
default:
|
|
e_warn(drv, "unknown eof = 0x%x\n", eof);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* sets up PARINC indicating data offset */
|
|
fh = (struct fc_frame_header *)skb_transport_header(skb);
|
|
if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
|
|
fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
|
|
|
|
/* hdr_len includes fc_hdr if FCoE lso is enabled */
|
|
*hdr_len = sizeof(struct fcoe_crc_eof);
|
|
if (skb_is_gso(skb))
|
|
*hdr_len += (skb_transport_offset(skb) +
|
|
sizeof(struct fc_frame_header));
|
|
/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
|
|
vlan_macip_lens = (skb_transport_offset(skb) +
|
|
sizeof(struct fc_frame_header));
|
|
vlan_macip_lens |= ((skb_transport_offset(skb) - 4)
|
|
<< IXGBE_ADVTXD_MACLEN_SHIFT);
|
|
vlan_macip_lens |= (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
|
|
|
|
/* type_tycmd and mss: set TUCMD.FCoE to enable offload */
|
|
type_tucmd = IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT |
|
|
IXGBE_ADVTXT_TUCMD_FCOE;
|
|
if (skb_is_gso(skb))
|
|
mss = skb_shinfo(skb)->gso_size;
|
|
/* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
|
|
mss_l4len_idx = (mss << IXGBE_ADVTXD_MSS_SHIFT) |
|
|
(1 << IXGBE_ADVTXD_IDX_SHIFT);
|
|
|
|
/* write context desc */
|
|
i = tx_ring->next_to_use;
|
|
context_desc = IXGBE_TX_CTXTDESC_ADV(tx_ring, i);
|
|
context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
|
|
context_desc->seqnum_seed = cpu_to_le32(fcoe_sof_eof);
|
|
context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
|
|
context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
|
|
|
|
tx_buffer_info = &tx_ring->tx_buffer_info[i];
|
|
tx_buffer_info->time_stamp = jiffies;
|
|
tx_buffer_info->next_to_watch = i;
|
|
|
|
i++;
|
|
if (i == tx_ring->count)
|
|
i = 0;
|
|
tx_ring->next_to_use = i;
|
|
|
|
return skb_is_gso(skb);
|
|
}
|
|
|
|
/**
|
|
* ixgbe_configure_fcoe - configures registers for fcoe at start
|
|
* @adapter: ptr to ixgbe adapter
|
|
*
|
|
* This sets up FCoE related registers
|
|
*
|
|
* Returns : none
|
|
*/
|
|
void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
|
|
{
|
|
int i, fcoe_q, fcoe_i;
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
|
|
#ifdef CONFIG_IXGBE_DCB
|
|
u8 tc;
|
|
u32 up2tc;
|
|
#endif
|
|
|
|
/* create the pool for ddp if not created yet */
|
|
if (!fcoe->pool) {
|
|
/* allocate ddp pool */
|
|
fcoe->pool = pci_pool_create("ixgbe_fcoe_ddp",
|
|
adapter->pdev, IXGBE_FCPTR_MAX,
|
|
IXGBE_FCPTR_ALIGN, PAGE_SIZE);
|
|
if (!fcoe->pool)
|
|
e_err(drv, "failed to allocated FCoE DDP pool\n");
|
|
|
|
spin_lock_init(&fcoe->lock);
|
|
|
|
/* Extra buffer to be shared by all DDPs for HW work around */
|
|
fcoe->extra_ddp_buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_ATOMIC);
|
|
if (fcoe->extra_ddp_buffer == NULL) {
|
|
e_err(drv, "failed to allocated extra DDP buffer\n");
|
|
goto out_extra_ddp_buffer_alloc;
|
|
}
|
|
|
|
fcoe->extra_ddp_buffer_dma =
|
|
dma_map_single(&adapter->pdev->dev,
|
|
fcoe->extra_ddp_buffer,
|
|
IXGBE_FCBUFF_MIN,
|
|
DMA_FROM_DEVICE);
|
|
if (dma_mapping_error(&adapter->pdev->dev,
|
|
fcoe->extra_ddp_buffer_dma)) {
|
|
e_err(drv, "failed to map extra DDP buffer\n");
|
|
goto out_extra_ddp_buffer_dma;
|
|
}
|
|
}
|
|
|
|
/* Enable L2 eth type filter for FCoE */
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
|
|
(ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
|
|
/* Enable L2 eth type filter for FIP */
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),
|
|
(ETH_P_FIP | IXGBE_ETQF_FILTER_EN));
|
|
if (adapter->ring_feature[RING_F_FCOE].indices) {
|
|
/* Use multiple rx queues for FCoE by redirection table */
|
|
for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
|
|
fcoe_i = f->mask + i % f->indices;
|
|
fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
|
|
}
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
|
|
} else {
|
|
/* Use single rx queue for FCoE */
|
|
fcoe_i = f->mask;
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
|
|
IXGBE_ETQS_QUEUE_EN |
|
|
(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
|
|
}
|
|
/* send FIP frames to the first FCoE queue */
|
|
fcoe_i = f->mask;
|
|
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
|
|
IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
|
|
IXGBE_ETQS_QUEUE_EN |
|
|
(fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
|
|
|
|
IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
|
|
IXGBE_FCRXCTRL_FCOELLI |
|
|
IXGBE_FCRXCTRL_FCCRCBO |
|
|
(FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
|
|
#ifdef CONFIG_IXGBE_DCB
|
|
up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
|
|
for (i = 0; i < MAX_USER_PRIORITY; i++) {
|
|
tc = (u8)(up2tc >> (i * IXGBE_RTTUP2TC_UP_SHIFT));
|
|
tc &= (MAX_TRAFFIC_CLASS - 1);
|
|
if (fcoe->tc == tc) {
|
|
fcoe->up = i;
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return;
|
|
|
|
out_extra_ddp_buffer_dma:
|
|
kfree(fcoe->extra_ddp_buffer);
|
|
out_extra_ddp_buffer_alloc:
|
|
pci_pool_destroy(fcoe->pool);
|
|
fcoe->pool = NULL;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_cleanup_fcoe - release all fcoe ddp context resources
|
|
* @adapter : ixgbe adapter
|
|
*
|
|
* Cleans up outstanding ddp context resources
|
|
*
|
|
* Returns : none
|
|
*/
|
|
void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
|
|
{
|
|
int i;
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
/* release ddp resource */
|
|
if (fcoe->pool) {
|
|
for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
|
|
ixgbe_fcoe_ddp_put(adapter->netdev, i);
|
|
dma_unmap_single(&adapter->pdev->dev,
|
|
fcoe->extra_ddp_buffer_dma,
|
|
IXGBE_FCBUFF_MIN,
|
|
DMA_FROM_DEVICE);
|
|
kfree(fcoe->extra_ddp_buffer);
|
|
pci_pool_destroy(fcoe->pool);
|
|
fcoe->pool = NULL;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_enable - turn on FCoE offload feature
|
|
* @netdev: the corresponding netdev
|
|
*
|
|
* Turns on FCoE offload feature in 82599.
|
|
*
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
*/
|
|
int ixgbe_fcoe_enable(struct net_device *netdev)
|
|
{
|
|
int rc = -EINVAL;
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
goto out_enable;
|
|
|
|
atomic_inc(&fcoe->refcnt);
|
|
if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
|
|
goto out_enable;
|
|
|
|
e_info(drv, "Enabling FCoE offload features.\n");
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
|
|
adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
|
|
adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
|
|
netdev->features |= NETIF_F_FCOE_CRC;
|
|
netdev->features |= NETIF_F_FSO;
|
|
netdev->features |= NETIF_F_FCOE_MTU;
|
|
netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
|
|
|
|
ixgbe_init_interrupt_scheme(adapter);
|
|
netdev_features_change(netdev);
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
rc = 0;
|
|
|
|
out_enable:
|
|
return rc;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_disable - turn off FCoE offload feature
|
|
* @netdev: the corresponding netdev
|
|
*
|
|
* Turns off FCoE offload feature in 82599.
|
|
*
|
|
* Returns : 0 indicates success or -EINVAL on failure
|
|
*/
|
|
int ixgbe_fcoe_disable(struct net_device *netdev)
|
|
{
|
|
int rc = -EINVAL;
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
|
|
goto out_disable;
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
|
|
goto out_disable;
|
|
|
|
if (!atomic_dec_and_test(&fcoe->refcnt))
|
|
goto out_disable;
|
|
|
|
e_info(drv, "Disabling FCoE offload features.\n");
|
|
netdev->features &= ~NETIF_F_FCOE_CRC;
|
|
netdev->features &= ~NETIF_F_FSO;
|
|
netdev->features &= ~NETIF_F_FCOE_MTU;
|
|
netdev->fcoe_ddp_xid = 0;
|
|
netdev_features_change(netdev);
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_stop(netdev);
|
|
|
|
ixgbe_clear_interrupt_scheme(adapter);
|
|
adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
|
|
adapter->ring_feature[RING_F_FCOE].indices = 0;
|
|
ixgbe_cleanup_fcoe(adapter);
|
|
ixgbe_init_interrupt_scheme(adapter);
|
|
|
|
if (netif_running(netdev))
|
|
netdev->netdev_ops->ndo_open(netdev);
|
|
rc = 0;
|
|
|
|
out_disable:
|
|
return rc;
|
|
}
|
|
|
|
#ifdef CONFIG_IXGBE_DCB
|
|
/**
|
|
* ixgbe_fcoe_getapp - retrieves current user priority bitmap for FCoE
|
|
* @adapter : ixgbe adapter
|
|
*
|
|
* Finds out the corresponding user priority bitmap from the current
|
|
* traffic class that FCoE belongs to. Returns 0 as the invalid user
|
|
* priority bitmap to indicate an error.
|
|
*
|
|
* Returns : 802.1p user priority bitmap for FCoE
|
|
*/
|
|
u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter)
|
|
{
|
|
return 1 << adapter->fcoe.up;
|
|
}
|
|
|
|
/**
|
|
* ixgbe_fcoe_setapp - sets the user priority bitmap for FCoE
|
|
* @adapter : ixgbe adapter
|
|
* @up : 802.1p user priority bitmap
|
|
*
|
|
* Finds out the traffic class from the input user priority
|
|
* bitmap for FCoE.
|
|
*
|
|
* Returns : 0 on success otherwise returns 1 on error
|
|
*/
|
|
u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up)
|
|
{
|
|
int i;
|
|
u32 up2tc;
|
|
|
|
/* valid user priority bitmap must not be 0 */
|
|
if (up) {
|
|
/* from user priority to the corresponding traffic class */
|
|
up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
|
|
for (i = 0; i < MAX_USER_PRIORITY; i++) {
|
|
if (up & (1 << i)) {
|
|
up2tc >>= (i * IXGBE_RTTUP2TC_UP_SHIFT);
|
|
up2tc &= (MAX_TRAFFIC_CLASS - 1);
|
|
adapter->fcoe.tc = (u8)up2tc;
|
|
adapter->fcoe.up = i;
|
|
return 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
#endif /* CONFIG_IXGBE_DCB */
|
|
|
|
/**
|
|
* ixgbe_fcoe_get_wwn - get world wide name for the node or the port
|
|
* @netdev : ixgbe adapter
|
|
* @wwn : the world wide name
|
|
* @type: the type of world wide name
|
|
*
|
|
* Returns the node or port world wide name if both the prefix and the san
|
|
* mac address are valid, then the wwn is formed based on the NAA-2 for
|
|
* IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
|
|
*
|
|
* Returns : 0 on success
|
|
*/
|
|
int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
|
|
{
|
|
int rc = -EINVAL;
|
|
u16 prefix = 0xffff;
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_mac_info *mac = &adapter->hw.mac;
|
|
|
|
switch (type) {
|
|
case NETDEV_FCOE_WWNN:
|
|
prefix = mac->wwnn_prefix;
|
|
break;
|
|
case NETDEV_FCOE_WWPN:
|
|
prefix = mac->wwpn_prefix;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if ((prefix != 0xffff) &&
|
|
is_valid_ether_addr(mac->san_addr)) {
|
|
*wwn = ((u64) prefix << 48) |
|
|
((u64) mac->san_addr[0] << 40) |
|
|
((u64) mac->san_addr[1] << 32) |
|
|
((u64) mac->san_addr[2] << 24) |
|
|
((u64) mac->san_addr[3] << 16) |
|
|
((u64) mac->san_addr[4] << 8) |
|
|
((u64) mac->san_addr[5]);
|
|
rc = 0;
|
|
}
|
|
return rc;
|
|
}
|
|
|
|
|