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47f36e4921
This series reworks some of the CCI-400 PMU code so that it can be used on both ARM and ARM64-based systems, without the need to boot in secure mode on the latter. This paves the way for CCI-500 support in future. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJVFWAiAAoJELescNyEwWM0pK8IALUinCT+Ec/Oi5WwGJaLgQgw exlDFAcmml0xisxglGL7eHcvNBs/j4wFD37mqDUszrGW3jrM+Ex+/cvUzWIlEyZl LjG99ZF2j51LFxDHMgpRwg1aD/NNQsQjwsuHHdCr+NHB5R2C0M4umsgX6Kt6/PE4 95LOnnjBOx4FkMOG9mZElzldUlqnhWd6drjQ9qZQar9VVVewfbR1LH/xQhjrCL0w nwRzJwYj1LnLFO0hBVUAJSfvYltMF9PxBEx0FkyzN7QcuP1tLQ25NmGEvarHP6iZ XpvTZ7akzButyUQbvz/kf6a0agPNUv1HHEqh7/Zddvgm//+p8nEBORuJ/cC6g1E= =UHCi -----END PGP SIGNATURE----- Merge tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/drivers Merge "arm-cci PMU updates for 4.1" from Will Deacon: CCI-400 PMU updates This series reworks some of the CCI-400 PMU code so that it can be used on both ARM and ARM64-based systems, without the need to boot in secure mode on the latter. This paves the way for CCI-500 support in future. * tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux: arm-cci: Fix CCI PMU event validation arm-cci: Split the code for PMU vs driver support arm-cci: Get rid of secure transactions for PMU driver arm-cci: Abstract the CCI400 PMU specific definitions arm-cci: Rearrange code for splitting PMU vs driver code drivers: cci: reject groups spanning multiple HW PMUs + Linux 4.0-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
104 lines
2.6 KiB
Plaintext
104 lines
2.6 KiB
Plaintext
#
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# Bus Devices
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#
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menu "Bus devices"
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config ARM_CCI
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bool
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config ARM_CCI400_COMMON
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bool
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select ARM_CCI
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config ARM_CCI400_PMU
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bool "ARM CCI400 PMU support"
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default y
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depends on ARM || ARM64
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depends on HW_PERF_EVENTS
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select ARM_CCI400_COMMON
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help
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Support for PMU events monitoring on the ARM CCI cache coherent
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interconnect.
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If unsure, say Y
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config ARM_CCI400_PORT_CTRL
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bool
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depends on ARM && OF && CPU_V7
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select ARM_CCI400_COMMON
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help
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Low level power management driver for CCI400 cache coherent
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interconnect for ARM platforms.
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config ARM_CCN
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bool "ARM CCN driver support"
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depends on ARM || ARM64
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depends on PERF_EVENTS
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help
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PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
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interconnect.
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config BRCMSTB_GISB_ARB
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bool "Broadcom STB GISB bus arbiter"
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depends on ARM || MIPS
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help
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Driver for the Broadcom Set Top Box System-on-a-chip internal bus
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arbiter. This driver provides timeout and target abort error handling
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and internal bus master decoding.
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config IMX_WEIM
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bool "Freescale EIM DRIVER"
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depends on ARCH_MXC
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help
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Driver for i.MX WEIM controller.
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The WEIM(Wireless External Interface Module) works like a bus.
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You can attach many different devices on it, such as NOR, onenand.
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config MVEBU_MBUS
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bool
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depends on PLAT_ORION
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help
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Driver needed for the MBus configuration on Marvell EBU SoCs
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(Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
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config OMAP_INTERCONNECT
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tristate "OMAP INTERCONNECT DRIVER"
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depends on ARCH_OMAP2PLUS
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help
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Driver to enable OMAP interconnect error handling driver.
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config OMAP_OCP2SCP
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tristate "OMAP OCP2SCP DRIVER"
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depends on ARCH_OMAP2PLUS
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help
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Driver to enable ocp2scp module which transforms ocp interface
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protocol to scp protocol. In OMAP4, USB PHY is connected via
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OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
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OCP2SCP.
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config SIMPLE_PM_BUS
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bool "Simple Power-Managed Bus Driver"
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depends on OF && PM
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depends on ARCH_SHMOBILE || COMPILE_TEST
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help
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Driver for transparent busses that don't need a real driver, but
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where the bus controller is part of a PM domain, or under the control
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of a functional clock, and thus relies on runtime PM for managing
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this PM domain and/or clock.
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An example of such a bus controller is the Renesas Bus State
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Controller (BSC, sometimes called "LBSC within Bus Bridge", or
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"External Bus Interface") as found on several Renesas ARM SoCs.
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config VEXPRESS_CONFIG
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bool "Versatile Express configuration bus"
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default y if ARCH_VEXPRESS
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depends on ARM || ARM64
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depends on OF
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select REGMAP
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help
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Platform configuration infrastructure for the ARM Ltd.
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Versatile Express.
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endmenu
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