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The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # samsung Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # versaclock5 Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org Acked-by: Abel Vesa <abel.vesa@linaro.org> #imx Signed-off-by: Stephen Boyd <sboyd@kernel.org>
250 lines
6.0 KiB
C
250 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
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*
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* Authors:
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* Jyri Sarha <jsarha@ti.com>
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* Sergej Sawazki <ce3a@gmx.de>
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*
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* Gpio controlled clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/gpio/consumer.h>
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#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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/**
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* DOC: basic gpio gated clock which can be enabled and disabled
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* with gpio output
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parent is (un)prepared
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* enable - clk_enable and clk_disable are functional & control gpio
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* rate - inherits rate from parent. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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/**
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* struct clk_gpio - gpio gated clock
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*
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* @hw: handle between common and hardware-specific interfaces
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* @gpiod: gpio descriptor
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*
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* Clock with a gpio control for enabling and disabling the parent clock
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* or switching between two parents by asserting or deasserting the gpio.
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*
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* Implements .enable, .disable and .is_enabled or
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* .get_parent, .set_parent and .determine_rate depending on which clk_ops
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* is used.
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*/
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struct clk_gpio {
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struct clk_hw hw;
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struct gpio_desc *gpiod;
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};
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#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
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static int clk_gpio_gate_enable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 1);
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return 0;
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}
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static void clk_gpio_gate_disable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 0);
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}
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static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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static const struct clk_ops clk_gpio_gate_ops = {
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.enable = clk_gpio_gate_enable,
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.disable = clk_gpio_gate_disable,
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.is_enabled = clk_gpio_gate_is_enabled,
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};
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static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value_cansleep(clk->gpiod, 1);
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return 0;
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}
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static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value_cansleep(clk->gpiod, 0);
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}
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static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value_cansleep(clk->gpiod);
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}
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static const struct clk_ops clk_sleeping_gpio_gate_ops = {
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.prepare = clk_sleeping_gpio_gate_prepare,
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.unprepare = clk_sleeping_gpio_gate_unprepare,
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.is_prepared = clk_sleeping_gpio_gate_is_prepared,
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};
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/**
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* DOC: basic clock multiplexer which can be controlled with a gpio output
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* rate - rate is only affected by parent switching. No clk_set_rate support
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* parent - parent is adjustable through clk_set_parent
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*/
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static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value_cansleep(clk->gpiod);
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}
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static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value_cansleep(clk->gpiod, index);
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return 0;
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}
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static const struct clk_ops clk_gpio_mux_ops = {
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.get_parent = clk_gpio_mux_get_parent,
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.set_parent = clk_gpio_mux_set_parent,
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.determine_rate = __clk_mux_determine_rate,
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};
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static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
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struct gpio_desc *gpiod,
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const struct clk_ops *clk_gpio_ops)
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{
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struct clk_gpio *clk_gpio;
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struct clk_hw *hw;
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struct clk_init_data init = {};
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int err;
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const struct clk_parent_data gpio_parent_data[] = {
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{ .index = 0 },
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{ .index = 1 },
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};
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clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
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if (!clk_gpio)
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return ERR_PTR(-ENOMEM);
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init.name = dev->of_node->name;
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init.ops = clk_gpio_ops;
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init.parent_data = gpio_parent_data;
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init.num_parents = num_parents;
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init.flags = CLK_SET_RATE_PARENT;
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clk_gpio->gpiod = gpiod;
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clk_gpio->hw.init = &init;
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hw = &clk_gpio->hw;
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err = devm_clk_hw_register(dev, hw);
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if (err)
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return ERR_PTR(err);
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return hw;
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}
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static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
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int num_parents,
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struct gpio_desc *gpiod)
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{
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const struct clk_ops *ops;
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if (gpiod_cansleep(gpiod))
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ops = &clk_sleeping_gpio_gate_ops;
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else
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ops = &clk_gpio_gate_ops;
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return clk_register_gpio(dev, num_parents, gpiod, ops);
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}
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static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
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struct gpio_desc *gpiod)
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{
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return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
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}
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static int gpio_clk_driver_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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const char *gpio_name;
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unsigned int num_parents;
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struct gpio_desc *gpiod;
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struct clk_hw *hw;
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bool is_mux;
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int ret;
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is_mux = of_device_is_compatible(node, "gpio-mux-clock");
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num_parents = of_clk_get_parent_count(node);
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if (is_mux && num_parents != 2) {
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dev_err(dev, "mux-clock must have 2 parents\n");
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return -EINVAL;
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}
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gpio_name = is_mux ? "select" : "enable";
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gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
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if (IS_ERR(gpiod)) {
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ret = PTR_ERR(gpiod);
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if (ret == -EPROBE_DEFER)
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pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
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node, __func__);
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else
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pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
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node, __func__,
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gpio_name);
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return ret;
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}
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if (is_mux)
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hw = clk_hw_register_gpio_mux(dev, gpiod);
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else
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hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
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if (IS_ERR(hw))
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return PTR_ERR(hw);
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
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}
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static const struct of_device_id gpio_clk_match_table[] = {
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{ .compatible = "gpio-mux-clock" },
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{ .compatible = "gpio-gate-clock" },
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{ }
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};
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static struct platform_driver gpio_clk_driver = {
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.probe = gpio_clk_driver_probe,
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.driver = {
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.name = "gpio-clk",
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.of_match_table = gpio_clk_match_table,
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},
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};
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builtin_platform_driver(gpio_clk_driver);
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