Richard Zhu c48e3db1df reset: imx7: Fix the iMX8MP PCIe PHY PERST support ... [ Upstream commit 051d9eb403 ] On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3) of SRC_PCIEPHY_RCR is 1b'1. But i.MX8MP has one inversed default value 1b'0 of PERST bit. And the PERST bit should be kept 1b'1 after power and clocks are stable. So fix the i.MX8MP PCIe PHY PERST support here. Fixes: e08672c039 ("reset: imx7: Add support for i.MX8MP SoC") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Marek Vasut <marex@denx.de> Tested-by: Richard Leitner <richard.leitner@skidata.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/1661845564-11373-5-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-10-05 10:39:40 +02:00
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hisilicon
sti
tegra	reset: tegra-bpmp: Restore Handle errors in BPMP response	2022-04-27 14:38:55 +02:00
core.c
Kconfig
Makefile
reset-a10sr.c
reset-ath79.c
reset-axs10x.c
reset-bcm6345.c
reset-berlin.c
reset-brcmstb-rescal.c
reset-brcmstb.c
reset-hsdk.c
reset-imx7.c	reset: imx7: Fix the iMX8MP PCIe PHY PERST support	2022-10-05 10:39:40 +02:00
reset-intel-gw.c
reset-k210.c
reset-lantiq.c
reset-lpc18xx.c
reset-meson-audio-arb.c
reset-meson.c
reset-microchip-sparx5.c
reset-npcm.c
reset-oxnas.c
reset-pistachio.c
reset-qcom-aoss.c
reset-qcom-pdc.c
reset-raspberrypi.c
reset-rzg2l-usbphy-ctrl.c	reset: renesas: Check return value of reset_control_deassert()	2022-04-27 14:38:55 +02:00
reset-scmi.c
reset-simple.c
reset-socfpga.c
reset-sunxi.c
reset-ti-sci.c
reset-ti-syscon.c
reset-uniphier-glue.c
reset-uniphier.c
reset-zynq.c
reset-zynqmp.c