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Add trace events for cache tag assign/unassign/flush operations and trace the events in the interfaces. These trace events will improve debugging capabilities by providing detailed information about cache tag activity. A sample of the traced messages looks like below [messages have been stripped and wrapped to make the line short]. cache_tag_assign: dmar9/0000:00:01.0 type iotlb did 1 pasid 9 ref 1 cache_tag_assign: dmar9/0000:00:01.0 type devtlb did 1 pasid 9 ref 1 cache_tag_flush_all: dmar6/0000:8a:00.0 type iotlb did 7 pasid 0 ref 1 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeab00000-0xeab1afff] addr 0xeab00000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeab20000-0xeab31fff] addr 0xeab20000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xeaa40000-0xeaa51fff] addr 0xeaa40000 pages 0x20 mask 0x5 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0x98de0000-0x98de4fff] addr 0x98de0000 pages 0x8 mask 0x3 cache_tag_flush_range: dmar1 0000:00:1b.0[0] type iotlb did 9 [0xe9828000-0xe9828fff] addr 0xe9828000 pages 0x1 mask 0x0 cache_tag_unassign: dmar9/0000:00:01.0 type iotlb did 1 pasid 9 ref 1 cache_tag_unassign: dmar9/0000:00:01.0 type devtlb did 1 pasid 9 ref 1 Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Link: https://lore.kernel.org/r/20240416080656.60968-4-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
197 lines
5.3 KiB
C
197 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Intel IOMMU trace support
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*
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* Copyright (C) 2019 Intel Corporation
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*
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* Author: Lu Baolu <baolu.lu@linux.intel.com>
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM intel_iommu
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#if !defined(_TRACE_INTEL_IOMMU_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_INTEL_IOMMU_H
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#include <linux/tracepoint.h>
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#include "iommu.h"
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#define MSG_MAX 256
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TRACE_EVENT(qi_submit,
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TP_PROTO(struct intel_iommu *iommu, u64 qw0, u64 qw1, u64 qw2, u64 qw3),
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TP_ARGS(iommu, qw0, qw1, qw2, qw3),
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TP_STRUCT__entry(
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__field(u64, qw0)
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__field(u64, qw1)
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__field(u64, qw2)
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__field(u64, qw3)
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__string(iommu, iommu->name)
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),
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TP_fast_assign(
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__assign_str(iommu, iommu->name);
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__entry->qw0 = qw0;
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__entry->qw1 = qw1;
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__entry->qw2 = qw2;
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__entry->qw3 = qw3;
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),
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TP_printk("%s %s: 0x%llx 0x%llx 0x%llx 0x%llx",
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__print_symbolic(__entry->qw0 & 0xf,
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{ QI_CC_TYPE, "cc_inv" },
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{ QI_IOTLB_TYPE, "iotlb_inv" },
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{ QI_DIOTLB_TYPE, "dev_tlb_inv" },
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{ QI_IEC_TYPE, "iec_inv" },
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{ QI_IWD_TYPE, "inv_wait" },
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{ QI_EIOTLB_TYPE, "p_iotlb_inv" },
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{ QI_PC_TYPE, "pc_inv" },
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{ QI_DEIOTLB_TYPE, "p_dev_tlb_inv" },
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{ QI_PGRP_RESP_TYPE, "page_grp_resp" }),
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__get_str(iommu),
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__entry->qw0, __entry->qw1, __entry->qw2, __entry->qw3
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)
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);
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TRACE_EVENT(prq_report,
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TP_PROTO(struct intel_iommu *iommu, struct device *dev,
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u64 dw0, u64 dw1, u64 dw2, u64 dw3,
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unsigned long seq),
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TP_ARGS(iommu, dev, dw0, dw1, dw2, dw3, seq),
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TP_STRUCT__entry(
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__field(u64, dw0)
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__field(u64, dw1)
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__field(u64, dw2)
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__field(u64, dw3)
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__field(unsigned long, seq)
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__string(iommu, iommu->name)
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__string(dev, dev_name(dev))
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__dynamic_array(char, buff, MSG_MAX)
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),
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TP_fast_assign(
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__entry->dw0 = dw0;
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__entry->dw1 = dw1;
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__entry->dw2 = dw2;
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__entry->dw3 = dw3;
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__entry->seq = seq;
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__assign_str(iommu, iommu->name);
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__assign_str(dev, dev_name(dev));
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),
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TP_printk("%s/%s seq# %ld: %s",
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__get_str(iommu), __get_str(dev), __entry->seq,
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decode_prq_descriptor(__get_str(buff), MSG_MAX, __entry->dw0,
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__entry->dw1, __entry->dw2, __entry->dw3)
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)
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);
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DECLARE_EVENT_CLASS(cache_tag_log,
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TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag),
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TP_STRUCT__entry(
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__string(iommu, tag->iommu->name)
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__string(dev, dev_name(tag->dev))
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__field(u16, type)
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__field(u16, domain_id)
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__field(u32, pasid)
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__field(u32, users)
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),
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TP_fast_assign(
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__assign_str(iommu, tag->iommu->name);
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__assign_str(dev, dev_name(tag->dev));
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__entry->type = tag->type;
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__entry->domain_id = tag->domain_id;
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__entry->pasid = tag->pasid;
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__entry->users = tag->users;
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),
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TP_printk("%s/%s type %s did %d pasid %d ref %d",
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__get_str(iommu), __get_str(dev),
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__print_symbolic(__entry->type,
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{ CACHE_TAG_IOTLB, "iotlb" },
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{ CACHE_TAG_DEVTLB, "devtlb" },
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{ CACHE_TAG_NESTING_IOTLB, "nesting_iotlb" },
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{ CACHE_TAG_NESTING_DEVTLB, "nesting_devtlb" }),
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__entry->domain_id, __entry->pasid, __entry->users
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)
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);
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DEFINE_EVENT(cache_tag_log, cache_tag_assign,
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TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
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);
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DEFINE_EVENT(cache_tag_log, cache_tag_unassign,
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TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
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);
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DEFINE_EVENT(cache_tag_log, cache_tag_flush_all,
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TP_PROTO(struct cache_tag *tag),
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TP_ARGS(tag)
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);
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DECLARE_EVENT_CLASS(cache_tag_flush,
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TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
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unsigned long addr, unsigned long pages, unsigned long mask),
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TP_ARGS(tag, start, end, addr, pages, mask),
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TP_STRUCT__entry(
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__string(iommu, tag->iommu->name)
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__string(dev, dev_name(tag->dev))
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__field(u16, type)
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__field(u16, domain_id)
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__field(u32, pasid)
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__field(unsigned long, start)
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__field(unsigned long, end)
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__field(unsigned long, addr)
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__field(unsigned long, pages)
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__field(unsigned long, mask)
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),
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TP_fast_assign(
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__assign_str(iommu, tag->iommu->name);
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__assign_str(dev, dev_name(tag->dev));
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__entry->type = tag->type;
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__entry->domain_id = tag->domain_id;
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__entry->pasid = tag->pasid;
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__entry->start = start;
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__entry->end = end;
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__entry->addr = addr;
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__entry->pages = pages;
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__entry->mask = mask;
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),
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TP_printk("%s %s[%d] type %s did %d [0x%lx-0x%lx] addr 0x%lx pages 0x%lx mask 0x%lx",
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__get_str(iommu), __get_str(dev), __entry->pasid,
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__print_symbolic(__entry->type,
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{ CACHE_TAG_IOTLB, "iotlb" },
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{ CACHE_TAG_DEVTLB, "devtlb" },
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{ CACHE_TAG_NESTING_IOTLB, "nesting_iotlb" },
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{ CACHE_TAG_NESTING_DEVTLB, "nesting_devtlb" }),
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__entry->domain_id, __entry->start, __entry->end,
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__entry->addr, __entry->pages, __entry->mask
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)
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);
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DEFINE_EVENT(cache_tag_flush, cache_tag_flush_range,
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TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
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unsigned long addr, unsigned long pages, unsigned long mask),
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TP_ARGS(tag, start, end, addr, pages, mask)
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);
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DEFINE_EVENT(cache_tag_flush, cache_tag_flush_range_np,
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TP_PROTO(struct cache_tag *tag, unsigned long start, unsigned long end,
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unsigned long addr, unsigned long pages, unsigned long mask),
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TP_ARGS(tag, start, end, addr, pages, mask)
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);
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#endif /* _TRACE_INTEL_IOMMU_H */
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/* This part must be outside protection */
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#undef TRACE_INCLUDE_PATH
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#undef TRACE_INCLUDE_FILE
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#define TRACE_INCLUDE_PATH ../../drivers/iommu/intel/
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#define TRACE_INCLUDE_FILE trace
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#include <trace/define_trace.h>
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