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All watchdog drivers implement the same set of ioctl commands, and fortunately all of them are compatible between 32-bit and 64-bit architectures. Modern drivers always go through drivers/watchdog/wdt.c as an abstraction layer, but older ones implement their own file_operations on a character device for this. Move the handling from fs/compat_ioctl.c into the individual drivers. Note that most of the legacy drivers will never be used on 64-bit hardware, because they are for an old 32-bit SoC implementation, but doing them all at once is safer than trying to guess which ones do or do not need the compat_ioctl handling. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
278 lines
6.9 KiB
C
278 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PNX833x Hardware Watchdog Driver
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* Copyright 2008 NXP Semiconductors
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* Daniel Laird <daniel.j.laird@nxp.com>
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* Andre McCurdy <andre.mccurdy@nxp.com>
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*
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* Heavily based upon - IndyDog 0.3
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* A Hardware Watchdog Device for SGI IP22
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*
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* (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
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*
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* based on softdog.c by Alan Cox <alan@redhat.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <asm/mach-pnx833x/pnx833x.h>
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#define WATCHDOG_TIMEOUT 30 /* 30 sec Maximum timeout */
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#define WATCHDOG_COUNT_FREQUENCY 68000000U /* Watchdog counts at 68MHZ. */
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#define PNX_WATCHDOG_TIMEOUT (WATCHDOG_TIMEOUT * WATCHDOG_COUNT_FREQUENCY)
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#define PNX_TIMEOUT_VALUE 2040000000U
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/** CONFIG block */
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#define PNX833X_CONFIG (0x07000U)
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#define PNX833X_CONFIG_CPU_WATCHDOG (0x54)
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#define PNX833X_CONFIG_CPU_WATCHDOG_COMPARE (0x58)
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#define PNX833X_CONFIG_CPU_COUNTERS_CONTROL (0x1c)
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/** RESET block */
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#define PNX833X_RESET (0x08000U)
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#define PNX833X_RESET_CONFIG (0x08)
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static int pnx833x_wdt_alive;
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/* Set default timeout in MHZ.*/
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static int pnx833x_wdt_timeout = PNX_WATCHDOG_TIMEOUT;
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module_param(pnx833x_wdt_timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in Mhz. (68Mhz clock), default="
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__MODULE_STRING(PNX_TIMEOUT_VALUE) "(30 seconds).");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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#define START_DEFAULT 1
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static int start_enabled = START_DEFAULT;
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module_param(start_enabled, int, 0);
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MODULE_PARM_DESC(start_enabled, "Watchdog is started on module insertion "
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"(default=" __MODULE_STRING(START_DEFAULT) ")");
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static void pnx833x_wdt_start(void)
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{
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/* Enable watchdog causing reset. */
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PNX833X_REG(PNX833X_RESET + PNX833X_RESET_CONFIG) |= 0x1;
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/* Set timeout.*/
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PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
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/* Enable watchdog. */
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PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_COUNTERS_CONTROL) |= 0x1;
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pr_info("Started watchdog timer\n");
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}
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static void pnx833x_wdt_stop(void)
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{
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/* Disable watchdog causing reset. */
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PNX833X_REG(PNX833X_RESET + PNX833X_CONFIG) &= 0xFFFFFFFE;
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/* Disable watchdog.*/
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PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_COUNTERS_CONTROL) &= 0xFFFFFFFE;
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pr_info("Stopped watchdog timer\n");
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}
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static void pnx833x_wdt_ping(void)
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{
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PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = pnx833x_wdt_timeout;
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}
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/*
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* Allow only one person to hold it open
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*/
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static int pnx833x_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &pnx833x_wdt_alive))
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return -EBUSY;
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if (nowayout)
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__module_get(THIS_MODULE);
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/* Activate timer */
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if (!start_enabled)
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pnx833x_wdt_start();
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pnx833x_wdt_ping();
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pr_info("Started watchdog timer\n");
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return stream_open(inode, file);
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}
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static int pnx833x_wdt_release(struct inode *inode, struct file *file)
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{
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/* Shut off the timer.
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* Lock it in if it's a module and we defined ...NOWAYOUT */
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if (!nowayout)
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pnx833x_wdt_stop(); /* Turn the WDT off */
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clear_bit(0, &pnx833x_wdt_alive);
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return 0;
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}
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static ssize_t pnx833x_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
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{
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/* Refresh the timer. */
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if (len)
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pnx833x_wdt_ping();
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return len;
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}
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static long pnx833x_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int options, new_timeout = 0;
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uint32_t timeout, timeout_left = 0;
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static const struct watchdog_info ident = {
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.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
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.firmware_version = 0,
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.identity = "Hardware Watchdog for PNX833x",
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};
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switch (cmd) {
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default:
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return -ENOTTY;
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case WDIOC_GETSUPPORT:
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if (copy_to_user((struct watchdog_info *)arg,
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&ident, sizeof(ident)))
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return -EFAULT;
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return 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, (int *)arg);
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case WDIOC_SETOPTIONS:
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if (get_user(options, (int *)arg))
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return -EFAULT;
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if (options & WDIOS_DISABLECARD)
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pnx833x_wdt_stop();
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if (options & WDIOS_ENABLECARD)
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pnx833x_wdt_start();
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return 0;
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case WDIOC_KEEPALIVE:
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pnx833x_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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{
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if (get_user(new_timeout, (int *)arg))
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return -EFAULT;
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pnx833x_wdt_timeout = new_timeout;
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PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_WATCHDOG_COMPARE) = new_timeout;
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return put_user(new_timeout, (int *)arg);
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}
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case WDIOC_GETTIMEOUT:
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timeout = PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_WATCHDOG_COMPARE);
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return put_user(timeout, (int *)arg);
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case WDIOC_GETTIMELEFT:
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timeout_left = PNX833X_REG(PNX833X_CONFIG +
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PNX833X_CONFIG_CPU_WATCHDOG);
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return put_user(timeout_left, (int *)arg);
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}
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}
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static int pnx833x_wdt_notify_sys(struct notifier_block *this,
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unsigned long code, void *unused)
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{
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if (code == SYS_DOWN || code == SYS_HALT)
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pnx833x_wdt_stop(); /* Turn the WDT off */
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return NOTIFY_DONE;
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}
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static const struct file_operations pnx833x_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = pnx833x_wdt_write,
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.unlocked_ioctl = pnx833x_wdt_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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.open = pnx833x_wdt_open,
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.release = pnx833x_wdt_release,
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};
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static struct miscdevice pnx833x_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &pnx833x_wdt_fops,
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};
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static struct notifier_block pnx833x_wdt_notifier = {
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.notifier_call = pnx833x_wdt_notify_sys,
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};
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static int __init watchdog_init(void)
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{
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int ret, cause;
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/* Lets check the reason for the reset.*/
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cause = PNX833X_REG(PNX833X_RESET);
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/*If bit 31 is set then watchdog was cause of reset.*/
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if (cause & 0x80000000) {
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pr_info("The system was previously reset due to the watchdog firing - please investigate...\n");
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}
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ret = register_reboot_notifier(&pnx833x_wdt_notifier);
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if (ret) {
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pr_err("cannot register reboot notifier (err=%d)\n", ret);
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return ret;
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}
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ret = misc_register(&pnx833x_wdt_miscdev);
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if (ret) {
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pr_err("cannot register miscdev on minor=%d (err=%d)\n",
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WATCHDOG_MINOR, ret);
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unregister_reboot_notifier(&pnx833x_wdt_notifier);
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return ret;
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}
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pr_info("Hardware Watchdog Timer for PNX833x: Version 0.1\n");
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if (start_enabled)
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pnx833x_wdt_start();
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return 0;
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}
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static void __exit watchdog_exit(void)
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{
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misc_deregister(&pnx833x_wdt_miscdev);
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unregister_reboot_notifier(&pnx833x_wdt_notifier);
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}
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module_init(watchdog_init);
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module_exit(watchdog_exit);
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MODULE_AUTHOR("Daniel Laird/Andre McCurdy");
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MODULE_DESCRIPTION("Hardware Watchdog Device for PNX833x");
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MODULE_LICENSE("GPL");
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