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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
188 lines
4.6 KiB
C
188 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2012 Calxeda, Inc.
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*/
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#include <linux/types.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/completion.h>
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#include <linux/mutex.h>
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#include <linux/notifier.h>
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#include <linux/spinlock.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/pl320-ipc.h>
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#define IPCMxSOURCE(m) ((m) * 0x40)
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#define IPCMxDSET(m) (((m) * 0x40) + 0x004)
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#define IPCMxDCLEAR(m) (((m) * 0x40) + 0x008)
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#define IPCMxDSTATUS(m) (((m) * 0x40) + 0x00C)
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#define IPCMxMODE(m) (((m) * 0x40) + 0x010)
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#define IPCMxMSET(m) (((m) * 0x40) + 0x014)
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#define IPCMxMCLEAR(m) (((m) * 0x40) + 0x018)
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#define IPCMxMSTATUS(m) (((m) * 0x40) + 0x01C)
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#define IPCMxSEND(m) (((m) * 0x40) + 0x020)
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#define IPCMxDR(m, dr) (((m) * 0x40) + ((dr) * 4) + 0x024)
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#define IPCMMIS(irq) (((irq) * 8) + 0x800)
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#define IPCMRIS(irq) (((irq) * 8) + 0x804)
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#define MBOX_MASK(n) (1 << (n))
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#define IPC_TX_MBOX 1
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#define IPC_RX_MBOX 2
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#define CHAN_MASK(n) (1 << (n))
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#define A9_SOURCE 1
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#define M3_SOURCE 0
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static void __iomem *ipc_base;
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static int ipc_irq;
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static DEFINE_MUTEX(ipc_m1_lock);
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static DECLARE_COMPLETION(ipc_completion);
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static ATOMIC_NOTIFIER_HEAD(ipc_notifier);
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static inline void set_destination(int source, int mbox)
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{
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writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDSET(mbox));
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writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMSET(mbox));
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}
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static inline void clear_destination(int source, int mbox)
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{
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writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxDCLEAR(mbox));
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writel_relaxed(CHAN_MASK(source), ipc_base + IPCMxMCLEAR(mbox));
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}
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static void __ipc_send(int mbox, u32 *data)
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{
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int i;
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for (i = 0; i < 7; i++)
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writel_relaxed(data[i], ipc_base + IPCMxDR(mbox, i));
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writel_relaxed(0x1, ipc_base + IPCMxSEND(mbox));
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}
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static u32 __ipc_rcv(int mbox, u32 *data)
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{
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int i;
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for (i = 0; i < 7; i++)
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data[i] = readl_relaxed(ipc_base + IPCMxDR(mbox, i));
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return data[1];
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}
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/* blocking implmentation from the A9 side, not usuable in interrupts! */
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int pl320_ipc_transmit(u32 *data)
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{
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int ret;
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mutex_lock(&ipc_m1_lock);
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init_completion(&ipc_completion);
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__ipc_send(IPC_TX_MBOX, data);
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ret = wait_for_completion_timeout(&ipc_completion,
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msecs_to_jiffies(1000));
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if (ret == 0) {
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ret = -ETIMEDOUT;
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goto out;
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}
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ret = __ipc_rcv(IPC_TX_MBOX, data);
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out:
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mutex_unlock(&ipc_m1_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(pl320_ipc_transmit);
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static irqreturn_t ipc_handler(int irq, void *dev)
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{
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u32 irq_stat;
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u32 data[7];
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irq_stat = readl_relaxed(ipc_base + IPCMMIS(1));
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if (irq_stat & MBOX_MASK(IPC_TX_MBOX)) {
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writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
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complete(&ipc_completion);
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}
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if (irq_stat & MBOX_MASK(IPC_RX_MBOX)) {
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__ipc_rcv(IPC_RX_MBOX, data);
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atomic_notifier_call_chain(&ipc_notifier, data[0], data + 1);
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writel_relaxed(2, ipc_base + IPCMxSEND(IPC_RX_MBOX));
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}
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return IRQ_HANDLED;
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}
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int pl320_ipc_register_notifier(struct notifier_block *nb)
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{
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return atomic_notifier_chain_register(&ipc_notifier, nb);
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}
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EXPORT_SYMBOL_GPL(pl320_ipc_register_notifier);
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int pl320_ipc_unregister_notifier(struct notifier_block *nb)
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{
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return atomic_notifier_chain_unregister(&ipc_notifier, nb);
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}
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EXPORT_SYMBOL_GPL(pl320_ipc_unregister_notifier);
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static int pl320_probe(struct amba_device *adev, const struct amba_id *id)
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{
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int ret;
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ipc_base = ioremap(adev->res.start, resource_size(&adev->res));
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if (ipc_base == NULL)
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return -ENOMEM;
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writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX));
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ipc_irq = adev->irq[0];
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ret = request_irq(ipc_irq, ipc_handler, 0, dev_name(&adev->dev), NULL);
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if (ret < 0)
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goto err;
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/* Init slow mailbox */
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writel_relaxed(CHAN_MASK(A9_SOURCE),
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ipc_base + IPCMxSOURCE(IPC_TX_MBOX));
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writel_relaxed(CHAN_MASK(M3_SOURCE),
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ipc_base + IPCMxDSET(IPC_TX_MBOX));
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writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
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ipc_base + IPCMxMSET(IPC_TX_MBOX));
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/* Init receive mailbox */
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writel_relaxed(CHAN_MASK(M3_SOURCE),
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ipc_base + IPCMxSOURCE(IPC_RX_MBOX));
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writel_relaxed(CHAN_MASK(A9_SOURCE),
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ipc_base + IPCMxDSET(IPC_RX_MBOX));
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writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE),
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ipc_base + IPCMxMSET(IPC_RX_MBOX));
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return 0;
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err:
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iounmap(ipc_base);
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return ret;
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}
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static struct amba_id pl320_ids[] = {
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{
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.id = 0x00041320,
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.mask = 0x000fffff,
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},
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{ 0, 0 },
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};
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static struct amba_driver pl320_driver = {
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.drv = {
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.name = "pl320",
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},
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.id_table = pl320_ids,
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.probe = pl320_probe,
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};
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static int __init ipc_init(void)
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{
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return amba_driver_register(&pl320_driver);
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}
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subsys_initcall(ipc_init);
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