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Loongson display controller IP has been integrated in both Loongson north
bridge chipset (ls7a1000/ls7a2000) and Loongson SoCs (ls2k1000/ls2k2000).
It has even been included in Loongson's BMC products. It has two display
pipes, and each display pipe supports a primary plane and a cursor plane.
For the DC in the LS7a1000, each display pipe has a DVO output interface,
which is able to support 1920x1080@60Hz. For the DC in the LS7A2000, each
display pipe is equipped with a built-in HDMI encoder, which is compliant
with the HDMI 1.4 specification. The first display pipe is also equipped
with a transparent VGA encoder, which is parallel with the HDMI encoder.
To get a decent performance for writing framebuffer data to the VRAM, the
write combine support should be enabled.
v1 -> v2:
1) Use hpd status reg when polling for ls7a2000.
2) Fix all warnings that emerged when compiling with W=1.
v2 -> v3:
1) Add COMPILE_TEST to Kconfig and make the driver off by default
2) Alphabetical sorting headers (Thomas)
3) Untangle register access functions as much as possible (Thomas)
4) Switch to TTM-based memory manager (Thomas)
5) Add the chip ID detection function which can be used to distinguish
chip models
6) Revise the built-in HDMI phy driver, nearly all main stream mode below
4K@30Hz is tested, and this driver supports clone(mirror) display mode
and extend(joint) display mode.
v3 -> v4:
1) Quickly fix a small mistake.
v4 -> v5:
1) Add per display pipe debugfs support to the builtin HDMI encoder.
v5 -> v6:
1) Remove stray code which didn't get used, say lsdc_of_get_reserved_ram
2) Fix all typos I could found, make sentences and code more readable
3) Untangle lsdc_hdmi*_connector_detect() function according to the pipe
4) Rename this driver as loongson.
v6 -> v7:
1) Add prime support for buffer self-sharing, sharing buffer with
drm/etnaviv is also tested and it works with limitations.
2) Implement buffer object tracking with list_head.
3) Add S3(sleep to RAM) support
4) Rewrite lsdc_bo_move since TTM core stop allocating resources
during BO creation. Patch V1 ~ V6 of this series no longer work.
Thus, we send V7.
v7 -> v8:
1) Zero a compile warning on a 32-bit platform, compile with W=1
2) Revise lsdc_bo_gpu_offset() and make minor cleanups.
3) Pageflip tested on the virtual terminal with the following commands:
modetest -M loongson -s 32:1920x1080 -v
modetest -M loongson -s 34:1920x1080 -v -F tiles
It works like a charm, when running the pageflip test with dual screens
configuration, another two additional BOs were created by the modetest,
VRAM usage up to 40+ MB, well we have at least 64MB, still enough.
# cat bos
bo[0000]: size: 8112kB VRAM
bo[0001]: size: 16kB VRAM
bo[0002]: size: 16kB VRAM
bo[0003]: size: 16208kB VRAM
bo[0004]: size: 8112kB VRAM
bo[0005]: size: 8112kB VRAM
v8 -> v9:
1) Select I2C and I2C_ALGOBIT in Kconfig, should depend on MMU.
2) Using pci_get_domain_bus_and_slot to get the GPU device.
v9 -> v10:
1) Revise lsdc_drm_freeze() to implement S3 correctly. We realized that
the pinned BO could not be moved, the VRAM lost power when sleeping
to RAM. Thus, the data in the buffer who is pinned in VRAM will get
lost when resumed. Yet it's not a big problem because this driver
relies on the CPU to update the front framebuffer. We can see the
garbage data when resume from S3, but the screen will show the right
image as I move the cursor. This is due to the CPU repaint. v10 of
this patch makes S3 perfect by unpin all of the BOs in VRAM, evict
them all to system RAM in lsdc_drm_freeze().
v10 -> v11:
1) On a double-screen case, The buffer object backing the single giant
framebuffer is referenced by two GEM objects; hence, it will be
pinned at least twice by prepare_fb() function. This causes its pin
count > 1. V10 of this patch only unpins VRAM BOs once when suspend,
which is not correct on double-screen case. V11 of this patch unpin
the BOs until its pin count reaches zero when suspend. Then, we make
the S3 support complete finally. With v11, I can't see any garbage
data when resume.
2) Fix vblank wait timeout when disable CRTC.
3) Test against IGT, at least fbdev test and kms_flip test passed.
4) Rewrite pixel PLL update function, magic numbers eliminated (Emil)
5) Drop a few common hardware features description in lsdc_desc (Emil)
6) Drop lsdc_mode_config_mode_valid(), instead add restrictions in dumb
create function. (Emil)
7) Untangle the ls7a1000 case and ls7a2000 case completely (Thomas)
v11 -> v12:
none
v12 -> v13:
1) Add benchmarks to figure out the bandwidth of the hardware platform.
Usage:
# cd /sys/kernel/debug/dri/0/
# cat benchmark
2) VRAM is filled with garbage data if uninitialized, add a buffer
clearing procedure (lsdc_bo_clear), clear the BO on creation time.
3) Update copyrights and adjust coding style (Huacai)
v13 -> v14:
1) Trying to add async update support for cursor plane.
v14 -> v15:
1) Add lsdc_vga_set_decode() funciton, which allow us remove multi-video
cards workaround, now it allow drm/loongson, drm/amdgpu, drm/etnaviv
co-exist in the system, more is also possible (Emil and Xuerui)
2) Fix typos and grammar mistakes as much as possible (Xuerui)
3) Unify copyrights as GPL-2.0+ (Xuerui)
4) Fix a bug introduce since V13, TTM may import BO from other drivers,
we shouldn't clear it on such a case.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: loongson-kernel@lists.loongnix.cn
Tested-by: Liu Peibao <liupeibao@loongson.cn>
Tested-by: Li Yi <liyi@loongson.cn>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
Link: https://patchwork.freedesktop.org/patch/msgid/20230615143613.1236245-2-15330273260@189.cn
13 lines
257 B
C
13 lines
257 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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#ifndef __LSDC_PROBE_H__
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#define __LSDC_PROBE_H__
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/* Helpers for chip detection */
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unsigned int loongson_cpu_get_prid(u8 *impl, u8 *rev);
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#endif
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