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630b4cee9c
Make two nonfunctional changes to the vector get/set vector reg functions and their supporting function for simplification and readability. The first is to not pass KVM_REG_RISCV_VECTOR, but rather integrate it directly into the masking. The second is to rename reg_val to reg_addr where and address is used instead of a value. Also opportunistically touch up some of the code formatting for a third nonfunctional change. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>
185 lines
4.6 KiB
C
185 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 SiFive
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*
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* Authors:
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* Vincent Chen <vincent.chen@sifive.com>
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* Greentime Hu <greentime.hu@sifive.com>
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*/
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/kvm_host.h>
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#include <linux/uaccess.h>
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#include <asm/hwcap.h>
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#include <asm/kvm_vcpu_vector.h>
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#include <asm/vector.h>
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#ifdef CONFIG_RISCV_ISA_V
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void kvm_riscv_vcpu_vector_reset(struct kvm_vcpu *vcpu)
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{
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unsigned long *isa = vcpu->arch.isa;
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struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
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cntx->sstatus &= ~SR_VS;
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if (riscv_isa_extension_available(isa, v)) {
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cntx->sstatus |= SR_VS_INITIAL;
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WARN_ON(!cntx->vector.datap);
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memset(cntx->vector.datap, 0, riscv_v_vsize);
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} else {
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cntx->sstatus |= SR_VS_OFF;
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}
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}
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static void kvm_riscv_vcpu_vector_clean(struct kvm_cpu_context *cntx)
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{
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cntx->sstatus &= ~SR_VS;
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cntx->sstatus |= SR_VS_CLEAN;
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}
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void kvm_riscv_vcpu_guest_vector_save(struct kvm_cpu_context *cntx,
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unsigned long *isa)
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{
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if ((cntx->sstatus & SR_VS) == SR_VS_DIRTY) {
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if (riscv_isa_extension_available(isa, v))
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__kvm_riscv_vector_save(cntx);
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kvm_riscv_vcpu_vector_clean(cntx);
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}
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}
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void kvm_riscv_vcpu_guest_vector_restore(struct kvm_cpu_context *cntx,
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unsigned long *isa)
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{
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if ((cntx->sstatus & SR_VS) != SR_VS_OFF) {
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if (riscv_isa_extension_available(isa, v))
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__kvm_riscv_vector_restore(cntx);
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kvm_riscv_vcpu_vector_clean(cntx);
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}
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}
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void kvm_riscv_vcpu_host_vector_save(struct kvm_cpu_context *cntx)
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{
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/* No need to check host sstatus as it can be modified outside */
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if (riscv_isa_extension_available(NULL, v))
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__kvm_riscv_vector_save(cntx);
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}
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void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_context *cntx)
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{
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if (riscv_isa_extension_available(NULL, v))
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__kvm_riscv_vector_restore(cntx);
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}
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int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu,
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struct kvm_cpu_context *cntx)
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{
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cntx->vector.datap = kmalloc(riscv_v_vsize, GFP_KERNEL);
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if (!cntx->vector.datap)
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return -ENOMEM;
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vcpu->arch.host_context.vector.datap = kzalloc(riscv_v_vsize, GFP_KERNEL);
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if (!vcpu->arch.host_context.vector.datap)
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return -ENOMEM;
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return 0;
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}
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void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu)
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{
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kfree(vcpu->arch.guest_reset_context.vector.datap);
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kfree(vcpu->arch.host_context.vector.datap);
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}
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#endif
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static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
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unsigned long reg_num,
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size_t reg_size,
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void **reg_addr)
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{
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struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
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size_t vlenb = riscv_v_vsize / 32;
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if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) {
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if (reg_size != sizeof(unsigned long))
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return -EINVAL;
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switch (reg_num) {
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case KVM_REG_RISCV_VECTOR_CSR_REG(vstart):
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*reg_addr = &cntx->vector.vstart;
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break;
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case KVM_REG_RISCV_VECTOR_CSR_REG(vl):
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*reg_addr = &cntx->vector.vl;
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break;
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case KVM_REG_RISCV_VECTOR_CSR_REG(vtype):
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*reg_addr = &cntx->vector.vtype;
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break;
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case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr):
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*reg_addr = &cntx->vector.vcsr;
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break;
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case KVM_REG_RISCV_VECTOR_CSR_REG(datap):
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default:
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return -ENOENT;
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}
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} else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) {
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if (reg_size != vlenb)
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return -EINVAL;
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*reg_addr = cntx->vector.datap +
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(reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;
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} else {
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return -ENOENT;
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}
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return 0;
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}
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int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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{
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unsigned long *isa = vcpu->arch.isa;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_VECTOR);
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size_t reg_size = KVM_REG_SIZE(reg->id);
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void *reg_addr;
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int rc;
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if (!riscv_isa_extension_available(isa, v))
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return -ENOENT;
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rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_addr);
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if (rc)
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return rc;
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if (copy_to_user(uaddr, reg_addr, reg_size))
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return -EFAULT;
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return 0;
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}
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int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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{
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unsigned long *isa = vcpu->arch.isa;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_VECTOR);
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size_t reg_size = KVM_REG_SIZE(reg->id);
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void *reg_addr;
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int rc;
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if (!riscv_isa_extension_available(isa, v))
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return -ENOENT;
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rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, ®_addr);
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if (rc)
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return rc;
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if (copy_from_user(reg_addr, uaddr, reg_size))
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return -EFAULT;
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return 0;
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}
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