linux/Documentation/devicetree/bindings/riscv
Conor Dooley 41ebfc91f7
dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support
The dt-binding was defined before the extraction of csr access and
fence.i into their own extensions, and thus the presence of the I
base extension implies Zicsr and Zifencei.
There's no harm in adding them obviously, but for backwards
compatibility with DTs that existed prior to that extraction, software
is unable to differentiate between "i" and "i_zicsr_zifencei" without
any further information.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230427-fence-blurred-c92fb69d4137@wendy
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-05-01 16:57:18 -07:00
..
canaan.yaml dt-bindings: add Canaan boards compatible strings 2021-02-22 17:51:06 -08:00
cpus.yaml dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support 2023-05-01 16:57:18 -07:00
microchip.yaml dt-bindings: riscv: microchip: document the Aldec TySoM 2023-01-20 22:03:37 +00:00
sifive.yaml dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board 2021-01-07 17:37:41 -08:00
starfive.yaml dt-bindings: riscv: correct starfive visionfive 2 compatibles 2023-02-16 22:08:25 +01:00
sunxi.yaml dt-bindings: arm: sunxi: document MangoPi MQ-R board names 2023-03-27 22:45:22 +02:00