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13799748b9
Use the restart table facility to return from interrupt or system calls without disabling MSR[EE] or MSR[RI]. Interrupt return asm is put into the low soft-masked region, to prevent interrupts being processed here, although they are still taken as masked interrupts which causes SRRs to be clobbered, and a pending soft-masked interrupt to require replaying. The return code uses restart table regions to redirct to a fixup handler rather than continue with the exit, if such an interrupt happens. In this case the interrupt return is redirected to a fixup handler which reloads r1 for the interrupt stack and reloads registers and sets state up to replay the soft-masked interrupt and try the exit again. Some types of security exit fallback flushes and barriers are currently unable to cope with reentrant interrupts, e.g., because they store some state in the scratch SPR which would be clobbered even by masked interrupts. For now the interrupts-enabled exits are disabled when these flushes are used. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Guard unused exit_must_hard_disable() as reported by lkp] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210617155116.2167984-13-npiggin@gmail.com
1008 lines
30 KiB
C
1008 lines
30 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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* Modifications for ppc64:
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* Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
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*
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* Copyright 2008 Michael Ellerman, IBM Corporation.
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*/
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#include <linux/types.h>
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#include <linux/jump_label.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/sched/mm.h>
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#include <linux/stop_machine.h>
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#include <asm/cputable.h>
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#include <asm/code-patching.h>
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#include <asm/interrupt.h>
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#include <asm/page.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/security_features.h>
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#include <asm/firmware.h>
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#include <asm/inst.h>
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struct fixup_entry {
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unsigned long mask;
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unsigned long value;
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long start_off;
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long end_off;
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long alt_start_off;
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long alt_end_off;
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};
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static u32 *calc_addr(struct fixup_entry *fcur, long offset)
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{
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/*
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* We store the offset to the code as a negative offset from
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* the start of the alt_entry, to support the VDSO. This
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* routine converts that back into an actual address.
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*/
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return (u32 *)((unsigned long)fcur + offset);
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}
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static int patch_alt_instruction(u32 *src, u32 *dest, u32 *alt_start, u32 *alt_end)
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{
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int err;
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struct ppc_inst instr;
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instr = ppc_inst_read(src);
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if (instr_is_relative_branch(ppc_inst_read(src))) {
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u32 *target = (u32 *)branch_target(src);
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/* Branch within the section doesn't need translating */
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if (target < alt_start || target > alt_end) {
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err = translate_branch(&instr, dest, src);
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if (err)
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return 1;
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}
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}
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raw_patch_instruction(dest, instr);
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return 0;
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}
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static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
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{
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u32 *start, *end, *alt_start, *alt_end, *src, *dest;
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start = calc_addr(fcur, fcur->start_off);
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end = calc_addr(fcur, fcur->end_off);
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alt_start = calc_addr(fcur, fcur->alt_start_off);
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alt_end = calc_addr(fcur, fcur->alt_end_off);
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if ((alt_end - alt_start) > (end - start))
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return 1;
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if ((value & fcur->mask) == fcur->value)
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return 0;
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src = alt_start;
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dest = start;
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for (; src < alt_end; src = ppc_inst_next(src, src),
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dest = ppc_inst_next(dest, dest)) {
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if (patch_alt_instruction(src, dest, alt_start, alt_end))
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return 1;
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}
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for (; dest < end; dest++)
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raw_patch_instruction(dest, ppc_inst(PPC_RAW_NOP()));
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return 0;
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}
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void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
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{
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struct fixup_entry *fcur, *fend;
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fcur = fixup_start;
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fend = fixup_end;
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for (; fcur < fend; fcur++) {
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if (patch_feature_section(value, fcur)) {
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WARN_ON(1);
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printk("Unable to patch feature section at %p - %p" \
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" with %p - %p\n",
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calc_addr(fcur, fcur->start_off),
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calc_addr(fcur, fcur->end_off),
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calc_addr(fcur, fcur->alt_start_off),
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calc_addr(fcur, fcur->alt_end_off));
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}
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}
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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static void do_stf_entry_barrier_fixups(enum stf_barrier_type types)
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{
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unsigned int instrs[3], *dest;
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long *start, *end;
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int i;
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start = PTRRELOC(&__start___stf_entry_barrier_fixup);
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end = PTRRELOC(&__stop___stf_entry_barrier_fixup);
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instrs[0] = PPC_RAW_NOP();
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instrs[1] = PPC_RAW_NOP();
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instrs[2] = PPC_RAW_NOP();
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i = 0;
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if (types & STF_BARRIER_FALLBACK) {
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instrs[i++] = PPC_RAW_MFLR(_R10);
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instrs[i++] = PPC_RAW_NOP(); /* branch patched below */
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instrs[i++] = PPC_RAW_MTLR(_R10);
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} else if (types & STF_BARRIER_EIEIO) {
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instrs[i++] = PPC_RAW_EIEIO() | 0x02000000; /* eieio + bit 6 hint */
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} else if (types & STF_BARRIER_SYNC_ORI) {
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instrs[i++] = PPC_RAW_SYNC();
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instrs[i++] = PPC_RAW_LD(_R10, _R13, 0);
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instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
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}
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for (i = 0; start < end; start++, i++) {
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dest = (void *)start + *start;
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pr_devel("patching dest %lx\n", (unsigned long)dest);
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// See comment in do_entry_flush_fixups() RE order of patching
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if (types & STF_BARRIER_FALLBACK) {
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patch_instruction(dest, ppc_inst(instrs[0]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_branch(dest + 1,
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(unsigned long)&stf_barrier_fallback, BRANCH_SET_LINK);
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} else {
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patch_instruction(dest + 1, ppc_inst(instrs[1]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_instruction(dest, ppc_inst(instrs[0]));
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}
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}
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printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i,
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(types == STF_BARRIER_NONE) ? "no" :
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(types == STF_BARRIER_FALLBACK) ? "fallback" :
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(types == STF_BARRIER_EIEIO) ? "eieio" :
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(types == (STF_BARRIER_SYNC_ORI)) ? "hwsync"
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: "unknown");
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}
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static void do_stf_exit_barrier_fixups(enum stf_barrier_type types)
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{
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unsigned int instrs[6], *dest;
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long *start, *end;
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int i;
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start = PTRRELOC(&__start___stf_exit_barrier_fixup);
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end = PTRRELOC(&__stop___stf_exit_barrier_fixup);
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instrs[0] = PPC_RAW_NOP();
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instrs[1] = PPC_RAW_NOP();
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instrs[2] = PPC_RAW_NOP();
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instrs[3] = PPC_RAW_NOP();
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instrs[4] = PPC_RAW_NOP();
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instrs[5] = PPC_RAW_NOP();
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i = 0;
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if (types & STF_BARRIER_FALLBACK || types & STF_BARRIER_SYNC_ORI) {
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if (cpu_has_feature(CPU_FTR_HVMODE)) {
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instrs[i++] = PPC_RAW_MTSPR(SPRN_HSPRG1, _R13);
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instrs[i++] = PPC_RAW_MFSPR(_R13, SPRN_HSPRG0);
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} else {
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instrs[i++] = PPC_RAW_MTSPR(SPRN_SPRG2, _R13);
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instrs[i++] = PPC_RAW_MFSPR(_R13, SPRN_SPRG1);
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}
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instrs[i++] = PPC_RAW_SYNC();
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instrs[i++] = PPC_RAW_LD(_R13, _R13, 0);
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instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
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if (cpu_has_feature(CPU_FTR_HVMODE))
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instrs[i++] = PPC_RAW_MFSPR(_R13, SPRN_HSPRG1);
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else
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instrs[i++] = PPC_RAW_MFSPR(_R13, SPRN_SPRG2);
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} else if (types & STF_BARRIER_EIEIO) {
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instrs[i++] = PPC_RAW_EIEIO() | 0x02000000; /* eieio + bit 6 hint */
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}
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for (i = 0; start < end; start++, i++) {
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dest = (void *)start + *start;
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pr_devel("patching dest %lx\n", (unsigned long)dest);
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patch_instruction(dest, ppc_inst(instrs[0]));
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patch_instruction(dest + 1, ppc_inst(instrs[1]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_instruction(dest + 3, ppc_inst(instrs[3]));
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patch_instruction(dest + 4, ppc_inst(instrs[4]));
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patch_instruction(dest + 5, ppc_inst(instrs[5]));
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}
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printk(KERN_DEBUG "stf-barrier: patched %d exit locations (%s barrier)\n", i,
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(types == STF_BARRIER_NONE) ? "no" :
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(types == STF_BARRIER_FALLBACK) ? "fallback" :
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(types == STF_BARRIER_EIEIO) ? "eieio" :
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(types == (STF_BARRIER_SYNC_ORI)) ? "hwsync"
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: "unknown");
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}
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static bool stf_exit_reentrant = false;
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static bool rfi_exit_reentrant = false;
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static int __do_stf_barrier_fixups(void *data)
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{
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enum stf_barrier_type *types = data;
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do_stf_entry_barrier_fixups(*types);
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do_stf_exit_barrier_fixups(*types);
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return 0;
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}
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void do_stf_barrier_fixups(enum stf_barrier_type types)
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{
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/*
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* The call to the fallback entry flush, and the fallback/sync-ori exit
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* flush can not be safely patched in/out while other CPUs are
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* executing them. So call __do_stf_barrier_fixups() on one CPU while
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* all other CPUs spin in the stop machine core with interrupts hard
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* disabled.
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*
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* The branch to mark interrupt exits non-reentrant is enabled first,
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* then stop_machine runs which will ensure all CPUs are out of the
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* low level interrupt exit code before patching. After the patching,
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* if allowed, then flip the branch to allow fast exits.
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*/
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static_branch_enable(&interrupt_exit_not_reentrant);
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stop_machine(__do_stf_barrier_fixups, &types, NULL);
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if ((types & STF_BARRIER_FALLBACK) || (types & STF_BARRIER_SYNC_ORI))
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stf_exit_reentrant = false;
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else
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stf_exit_reentrant = true;
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if (stf_exit_reentrant && rfi_exit_reentrant)
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static_branch_disable(&interrupt_exit_not_reentrant);
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}
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void do_uaccess_flush_fixups(enum l1d_flush_type types)
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{
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unsigned int instrs[4], *dest;
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long *start, *end;
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int i;
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start = PTRRELOC(&__start___uaccess_flush_fixup);
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end = PTRRELOC(&__stop___uaccess_flush_fixup);
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instrs[0] = PPC_RAW_NOP();
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instrs[1] = PPC_RAW_NOP();
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instrs[2] = PPC_RAW_NOP();
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instrs[3] = PPC_RAW_BLR();
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i = 0;
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if (types == L1D_FLUSH_FALLBACK) {
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instrs[3] = PPC_RAW_NOP();
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/* fallthrough to fallback flush */
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}
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if (types & L1D_FLUSH_ORI) {
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instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
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instrs[i++] = PPC_RAW_ORI(_R30, _R30, 0); /* L1d flush */
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}
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if (types & L1D_FLUSH_MTTRIG)
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instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0);
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for (i = 0; start < end; start++, i++) {
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dest = (void *)start + *start;
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pr_devel("patching dest %lx\n", (unsigned long)dest);
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patch_instruction(dest, ppc_inst(instrs[0]));
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patch_instruction(dest + 1, ppc_inst(instrs[1]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_instruction(dest + 3, ppc_inst(instrs[3]));
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}
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printk(KERN_DEBUG "uaccess-flush: patched %d locations (%s flush)\n", i,
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(types == L1D_FLUSH_NONE) ? "no" :
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(types == L1D_FLUSH_FALLBACK) ? "fallback displacement" :
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(types & L1D_FLUSH_ORI) ? (types & L1D_FLUSH_MTTRIG)
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? "ori+mttrig type"
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: "ori type" :
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(types & L1D_FLUSH_MTTRIG) ? "mttrig type"
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: "unknown");
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}
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static int __do_entry_flush_fixups(void *data)
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{
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enum l1d_flush_type types = *(enum l1d_flush_type *)data;
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unsigned int instrs[3], *dest;
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long *start, *end;
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int i;
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instrs[0] = PPC_RAW_NOP();
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instrs[1] = PPC_RAW_NOP();
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instrs[2] = PPC_RAW_NOP();
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i = 0;
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if (types == L1D_FLUSH_FALLBACK) {
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instrs[i++] = PPC_RAW_MFLR(_R10);
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instrs[i++] = PPC_RAW_NOP(); /* branch patched below */
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instrs[i++] = PPC_RAW_MTLR(_R10);
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}
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if (types & L1D_FLUSH_ORI) {
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instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
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instrs[i++] = PPC_RAW_ORI(_R30, _R30, 0); /* L1d flush */
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}
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if (types & L1D_FLUSH_MTTRIG)
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instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0);
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/*
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* If we're patching in or out the fallback flush we need to be careful about the
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* order in which we patch instructions. That's because it's possible we could
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* take a page fault after patching one instruction, so the sequence of
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* instructions must be safe even in a half patched state.
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*
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* To make that work, when patching in the fallback flush we patch in this order:
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* - the mflr (dest)
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* - the mtlr (dest + 2)
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* - the branch (dest + 1)
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*
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* That ensures the sequence is safe to execute at any point. In contrast if we
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* patch the mtlr last, it's possible we could return from the branch and not
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* restore LR, leading to a crash later.
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*
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* When patching out the fallback flush (either with nops or another flush type),
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* we patch in this order:
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* - the branch (dest + 1)
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* - the mtlr (dest + 2)
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* - the mflr (dest)
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*
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* Note we are protected by stop_machine() from other CPUs executing the code in a
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* semi-patched state.
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*/
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start = PTRRELOC(&__start___entry_flush_fixup);
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end = PTRRELOC(&__stop___entry_flush_fixup);
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for (i = 0; start < end; start++, i++) {
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dest = (void *)start + *start;
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pr_devel("patching dest %lx\n", (unsigned long)dest);
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if (types == L1D_FLUSH_FALLBACK) {
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patch_instruction(dest, ppc_inst(instrs[0]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_branch(dest + 1,
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(unsigned long)&entry_flush_fallback, BRANCH_SET_LINK);
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} else {
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patch_instruction(dest + 1, ppc_inst(instrs[1]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_instruction(dest, ppc_inst(instrs[0]));
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}
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}
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start = PTRRELOC(&__start___scv_entry_flush_fixup);
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end = PTRRELOC(&__stop___scv_entry_flush_fixup);
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for (; start < end; start++, i++) {
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dest = (void *)start + *start;
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pr_devel("patching dest %lx\n", (unsigned long)dest);
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if (types == L1D_FLUSH_FALLBACK) {
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patch_instruction(dest, ppc_inst(instrs[0]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_branch(dest + 1,
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(unsigned long)&scv_entry_flush_fallback, BRANCH_SET_LINK);
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} else {
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patch_instruction(dest + 1, ppc_inst(instrs[1]));
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patch_instruction(dest + 2, ppc_inst(instrs[2]));
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patch_instruction(dest, ppc_inst(instrs[0]));
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}
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}
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printk(KERN_DEBUG "entry-flush: patched %d locations (%s flush)\n", i,
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(types == L1D_FLUSH_NONE) ? "no" :
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(types == L1D_FLUSH_FALLBACK) ? "fallback displacement" :
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(types & L1D_FLUSH_ORI) ? (types & L1D_FLUSH_MTTRIG)
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? "ori+mttrig type"
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: "ori type" :
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(types & L1D_FLUSH_MTTRIG) ? "mttrig type"
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: "unknown");
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return 0;
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}
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void do_entry_flush_fixups(enum l1d_flush_type types)
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{
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/*
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* The call to the fallback flush can not be safely patched in/out while
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* other CPUs are executing it. So call __do_entry_flush_fixups() on one
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* CPU while all other CPUs spin in the stop machine core with interrupts
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* hard disabled.
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*/
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stop_machine(__do_entry_flush_fixups, &types, NULL);
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}
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static int __do_rfi_flush_fixups(void *data)
|
|
{
|
|
enum l1d_flush_type types = *(enum l1d_flush_type *)data;
|
|
unsigned int instrs[3], *dest;
|
|
long *start, *end;
|
|
int i;
|
|
|
|
start = PTRRELOC(&__start___rfi_flush_fixup);
|
|
end = PTRRELOC(&__stop___rfi_flush_fixup);
|
|
|
|
instrs[0] = PPC_RAW_NOP();
|
|
instrs[1] = PPC_RAW_NOP();
|
|
instrs[2] = PPC_RAW_NOP();
|
|
|
|
if (types & L1D_FLUSH_FALLBACK)
|
|
/* b .+16 to fallback flush */
|
|
instrs[0] = PPC_INST_BRANCH | 16;
|
|
|
|
i = 0;
|
|
if (types & L1D_FLUSH_ORI) {
|
|
instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
|
|
instrs[i++] = PPC_RAW_ORI(_R30, _R30, 0); /* L1d flush */
|
|
}
|
|
|
|
if (types & L1D_FLUSH_MTTRIG)
|
|
instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0);
|
|
|
|
for (i = 0; start < end; start++, i++) {
|
|
dest = (void *)start + *start;
|
|
|
|
pr_devel("patching dest %lx\n", (unsigned long)dest);
|
|
|
|
patch_instruction(dest, ppc_inst(instrs[0]));
|
|
patch_instruction(dest + 1, ppc_inst(instrs[1]));
|
|
patch_instruction(dest + 2, ppc_inst(instrs[2]));
|
|
}
|
|
|
|
printk(KERN_DEBUG "rfi-flush: patched %d locations (%s flush)\n", i,
|
|
(types == L1D_FLUSH_NONE) ? "no" :
|
|
(types == L1D_FLUSH_FALLBACK) ? "fallback displacement" :
|
|
(types & L1D_FLUSH_ORI) ? (types & L1D_FLUSH_MTTRIG)
|
|
? "ori+mttrig type"
|
|
: "ori type" :
|
|
(types & L1D_FLUSH_MTTRIG) ? "mttrig type"
|
|
: "unknown");
|
|
|
|
return 0;
|
|
}
|
|
|
|
void do_rfi_flush_fixups(enum l1d_flush_type types)
|
|
{
|
|
/*
|
|
* stop_machine gets all CPUs out of the interrupt exit handler same
|
|
* as do_stf_barrier_fixups. do_rfi_flush_fixups patching can run
|
|
* without stop_machine, so this could be achieved with a broadcast
|
|
* IPI instead, but this matches the stf sequence.
|
|
*/
|
|
static_branch_enable(&interrupt_exit_not_reentrant);
|
|
|
|
stop_machine(__do_rfi_flush_fixups, &types, NULL);
|
|
|
|
if (types & L1D_FLUSH_FALLBACK)
|
|
rfi_exit_reentrant = false;
|
|
else
|
|
rfi_exit_reentrant = true;
|
|
|
|
if (stf_exit_reentrant && rfi_exit_reentrant)
|
|
static_branch_disable(&interrupt_exit_not_reentrant);
|
|
}
|
|
|
|
void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end)
|
|
{
|
|
unsigned int instr, *dest;
|
|
long *start, *end;
|
|
int i;
|
|
|
|
start = fixup_start;
|
|
end = fixup_end;
|
|
|
|
instr = PPC_RAW_NOP();
|
|
|
|
if (enable) {
|
|
pr_info("barrier-nospec: using ORI speculation barrier\n");
|
|
instr = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */
|
|
}
|
|
|
|
for (i = 0; start < end; start++, i++) {
|
|
dest = (void *)start + *start;
|
|
|
|
pr_devel("patching dest %lx\n", (unsigned long)dest);
|
|
patch_instruction(dest, ppc_inst(instr));
|
|
}
|
|
|
|
printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
|
|
}
|
|
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
#ifdef CONFIG_PPC_BARRIER_NOSPEC
|
|
void do_barrier_nospec_fixups(bool enable)
|
|
{
|
|
void *start, *end;
|
|
|
|
start = PTRRELOC(&__start___barrier_nospec_fixup);
|
|
end = PTRRELOC(&__stop___barrier_nospec_fixup);
|
|
|
|
do_barrier_nospec_fixups_range(enable, start, end);
|
|
}
|
|
#endif /* CONFIG_PPC_BARRIER_NOSPEC */
|
|
|
|
#ifdef CONFIG_PPC_FSL_BOOK3E
|
|
void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end)
|
|
{
|
|
unsigned int instr[2], *dest;
|
|
long *start, *end;
|
|
int i;
|
|
|
|
start = fixup_start;
|
|
end = fixup_end;
|
|
|
|
instr[0] = PPC_RAW_NOP();
|
|
instr[1] = PPC_RAW_NOP();
|
|
|
|
if (enable) {
|
|
pr_info("barrier-nospec: using isync; sync as speculation barrier\n");
|
|
instr[0] = PPC_RAW_ISYNC();
|
|
instr[1] = PPC_RAW_SYNC();
|
|
}
|
|
|
|
for (i = 0; start < end; start++, i++) {
|
|
dest = (void *)start + *start;
|
|
|
|
pr_devel("patching dest %lx\n", (unsigned long)dest);
|
|
patch_instruction(dest, ppc_inst(instr[0]));
|
|
patch_instruction(dest + 1, ppc_inst(instr[1]));
|
|
}
|
|
|
|
printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
|
|
}
|
|
|
|
static void patch_btb_flush_section(long *curr)
|
|
{
|
|
unsigned int *start, *end;
|
|
|
|
start = (void *)curr + *curr;
|
|
end = (void *)curr + *(curr + 1);
|
|
for (; start < end; start++) {
|
|
pr_devel("patching dest %lx\n", (unsigned long)start);
|
|
patch_instruction(start, ppc_inst(PPC_RAW_NOP()));
|
|
}
|
|
}
|
|
|
|
void do_btb_flush_fixups(void)
|
|
{
|
|
long *start, *end;
|
|
|
|
start = PTRRELOC(&__start__btb_flush_fixup);
|
|
end = PTRRELOC(&__stop__btb_flush_fixup);
|
|
|
|
for (; start < end; start += 2)
|
|
patch_btb_flush_section(start);
|
|
}
|
|
#endif /* CONFIG_PPC_FSL_BOOK3E */
|
|
|
|
void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
|
|
{
|
|
long *start, *end;
|
|
u32 *dest;
|
|
|
|
if (!(value & CPU_FTR_LWSYNC))
|
|
return ;
|
|
|
|
start = fixup_start;
|
|
end = fixup_end;
|
|
|
|
for (; start < end; start++) {
|
|
dest = (void *)start + *start;
|
|
raw_patch_instruction(dest, ppc_inst(PPC_INST_LWSYNC));
|
|
}
|
|
}
|
|
|
|
static void do_final_fixups(void)
|
|
{
|
|
#if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE)
|
|
struct ppc_inst inst;
|
|
u32 *src, *dest, *end;
|
|
|
|
if (PHYSICAL_START == 0)
|
|
return;
|
|
|
|
src = (u32 *)(KERNELBASE + PHYSICAL_START);
|
|
dest = (u32 *)KERNELBASE;
|
|
end = (void *)src + (__end_interrupts - _stext);
|
|
|
|
while (src < end) {
|
|
inst = ppc_inst_read(src);
|
|
raw_patch_instruction(dest, inst);
|
|
src = ppc_inst_next(src, src);
|
|
dest = ppc_inst_next(dest, dest);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static unsigned long __initdata saved_cpu_features;
|
|
static unsigned int __initdata saved_mmu_features;
|
|
#ifdef CONFIG_PPC64
|
|
static unsigned long __initdata saved_firmware_features;
|
|
#endif
|
|
|
|
void __init apply_feature_fixups(void)
|
|
{
|
|
struct cpu_spec *spec = PTRRELOC(*PTRRELOC(&cur_cpu_spec));
|
|
|
|
*PTRRELOC(&saved_cpu_features) = spec->cpu_features;
|
|
*PTRRELOC(&saved_mmu_features) = spec->mmu_features;
|
|
|
|
/*
|
|
* Apply the CPU-specific and firmware specific fixups to kernel text
|
|
* (nop out sections not relevant to this CPU or this firmware).
|
|
*/
|
|
do_feature_fixups(spec->cpu_features,
|
|
PTRRELOC(&__start___ftr_fixup),
|
|
PTRRELOC(&__stop___ftr_fixup));
|
|
|
|
do_feature_fixups(spec->mmu_features,
|
|
PTRRELOC(&__start___mmu_ftr_fixup),
|
|
PTRRELOC(&__stop___mmu_ftr_fixup));
|
|
|
|
do_lwsync_fixups(spec->cpu_features,
|
|
PTRRELOC(&__start___lwsync_fixup),
|
|
PTRRELOC(&__stop___lwsync_fixup));
|
|
|
|
#ifdef CONFIG_PPC64
|
|
saved_firmware_features = powerpc_firmware_features;
|
|
do_feature_fixups(powerpc_firmware_features,
|
|
&__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
|
|
#endif
|
|
do_final_fixups();
|
|
}
|
|
|
|
void __init setup_feature_keys(void)
|
|
{
|
|
/*
|
|
* Initialise jump label. This causes all the cpu/mmu_has_feature()
|
|
* checks to take on their correct polarity based on the current set of
|
|
* CPU/MMU features.
|
|
*/
|
|
jump_label_init();
|
|
cpu_feature_keys_init();
|
|
mmu_feature_keys_init();
|
|
}
|
|
|
|
static int __init check_features(void)
|
|
{
|
|
WARN(saved_cpu_features != cur_cpu_spec->cpu_features,
|
|
"CPU features changed after feature patching!\n");
|
|
WARN(saved_mmu_features != cur_cpu_spec->mmu_features,
|
|
"MMU features changed after feature patching!\n");
|
|
#ifdef CONFIG_PPC64
|
|
WARN(saved_firmware_features != powerpc_firmware_features,
|
|
"Firmware features changed after feature patching!\n");
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
late_initcall(check_features);
|
|
|
|
#ifdef CONFIG_FTR_FIXUP_SELFTEST
|
|
|
|
#define check(x) \
|
|
if (!(x)) printk("feature-fixups: test failed at line %d\n", __LINE__);
|
|
|
|
/* This must be after the text it fixes up, vmlinux.lds.S enforces that atm */
|
|
static struct fixup_entry fixup;
|
|
|
|
static long calc_offset(struct fixup_entry *entry, unsigned int *p)
|
|
{
|
|
return (unsigned long)p - (unsigned long)entry;
|
|
}
|
|
|
|
static void test_basic_patching(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test1[];
|
|
extern unsigned int end_ftr_fixup_test1[];
|
|
extern unsigned int ftr_fixup_test1_orig[];
|
|
extern unsigned int ftr_fixup_test1_expected[];
|
|
int size = 4 * (end_ftr_fixup_test1 - ftr_fixup_test1);
|
|
|
|
fixup.value = fixup.mask = 8;
|
|
fixup.start_off = calc_offset(&fixup, ftr_fixup_test1 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_test1 + 2);
|
|
fixup.alt_start_off = fixup.alt_end_off = 0;
|
|
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_test1, ftr_fixup_test1_orig, size) == 0);
|
|
|
|
/* Check we don't patch if the value matches */
|
|
patch_feature_section(8, &fixup);
|
|
check(memcmp(ftr_fixup_test1, ftr_fixup_test1_orig, size) == 0);
|
|
|
|
/* Check we do patch if the value doesn't match */
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_test1, ftr_fixup_test1_expected, size) == 0);
|
|
|
|
/* Check we do patch if the mask doesn't match */
|
|
memcpy(ftr_fixup_test1, ftr_fixup_test1_orig, size);
|
|
check(memcmp(ftr_fixup_test1, ftr_fixup_test1_orig, size) == 0);
|
|
patch_feature_section(~8, &fixup);
|
|
check(memcmp(ftr_fixup_test1, ftr_fixup_test1_expected, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_patching(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test2[];
|
|
extern unsigned int end_ftr_fixup_test2[];
|
|
extern unsigned int ftr_fixup_test2_orig[];
|
|
extern unsigned int ftr_fixup_test2_alt[];
|
|
extern unsigned int ftr_fixup_test2_expected[];
|
|
int size = 4 * (end_ftr_fixup_test2 - ftr_fixup_test2);
|
|
|
|
fixup.value = fixup.mask = 0xF;
|
|
fixup.start_off = calc_offset(&fixup, ftr_fixup_test2 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_test2 + 2);
|
|
fixup.alt_start_off = calc_offset(&fixup, ftr_fixup_test2_alt);
|
|
fixup.alt_end_off = calc_offset(&fixup, ftr_fixup_test2_alt + 1);
|
|
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_test2, ftr_fixup_test2_orig, size) == 0);
|
|
|
|
/* Check we don't patch if the value matches */
|
|
patch_feature_section(0xF, &fixup);
|
|
check(memcmp(ftr_fixup_test2, ftr_fixup_test2_orig, size) == 0);
|
|
|
|
/* Check we do patch if the value doesn't match */
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_test2, ftr_fixup_test2_expected, size) == 0);
|
|
|
|
/* Check we do patch if the mask doesn't match */
|
|
memcpy(ftr_fixup_test2, ftr_fixup_test2_orig, size);
|
|
check(memcmp(ftr_fixup_test2, ftr_fixup_test2_orig, size) == 0);
|
|
patch_feature_section(~0xF, &fixup);
|
|
check(memcmp(ftr_fixup_test2, ftr_fixup_test2_expected, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_case_too_big(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test3[];
|
|
extern unsigned int end_ftr_fixup_test3[];
|
|
extern unsigned int ftr_fixup_test3_orig[];
|
|
extern unsigned int ftr_fixup_test3_alt[];
|
|
int size = 4 * (end_ftr_fixup_test3 - ftr_fixup_test3);
|
|
|
|
fixup.value = fixup.mask = 0xC;
|
|
fixup.start_off = calc_offset(&fixup, ftr_fixup_test3 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_test3 + 2);
|
|
fixup.alt_start_off = calc_offset(&fixup, ftr_fixup_test3_alt);
|
|
fixup.alt_end_off = calc_offset(&fixup, ftr_fixup_test3_alt + 2);
|
|
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_test3, ftr_fixup_test3_orig, size) == 0);
|
|
|
|
/* Expect nothing to be patched, and the error returned to us */
|
|
check(patch_feature_section(0xF, &fixup) == 1);
|
|
check(memcmp(ftr_fixup_test3, ftr_fixup_test3_orig, size) == 0);
|
|
check(patch_feature_section(0, &fixup) == 1);
|
|
check(memcmp(ftr_fixup_test3, ftr_fixup_test3_orig, size) == 0);
|
|
check(patch_feature_section(~0xF, &fixup) == 1);
|
|
check(memcmp(ftr_fixup_test3, ftr_fixup_test3_orig, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_case_too_small(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test4[];
|
|
extern unsigned int end_ftr_fixup_test4[];
|
|
extern unsigned int ftr_fixup_test4_orig[];
|
|
extern unsigned int ftr_fixup_test4_alt[];
|
|
extern unsigned int ftr_fixup_test4_expected[];
|
|
int size = 4 * (end_ftr_fixup_test4 - ftr_fixup_test4);
|
|
unsigned long flag;
|
|
|
|
/* Check a high-bit flag */
|
|
flag = 1UL << ((sizeof(unsigned long) - 1) * 8);
|
|
fixup.value = fixup.mask = flag;
|
|
fixup.start_off = calc_offset(&fixup, ftr_fixup_test4 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_test4 + 5);
|
|
fixup.alt_start_off = calc_offset(&fixup, ftr_fixup_test4_alt);
|
|
fixup.alt_end_off = calc_offset(&fixup, ftr_fixup_test4_alt + 2);
|
|
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_test4, ftr_fixup_test4_orig, size) == 0);
|
|
|
|
/* Check we don't patch if the value matches */
|
|
patch_feature_section(flag, &fixup);
|
|
check(memcmp(ftr_fixup_test4, ftr_fixup_test4_orig, size) == 0);
|
|
|
|
/* Check we do patch if the value doesn't match */
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_test4, ftr_fixup_test4_expected, size) == 0);
|
|
|
|
/* Check we do patch if the mask doesn't match */
|
|
memcpy(ftr_fixup_test4, ftr_fixup_test4_orig, size);
|
|
check(memcmp(ftr_fixup_test4, ftr_fixup_test4_orig, size) == 0);
|
|
patch_feature_section(~flag, &fixup);
|
|
check(memcmp(ftr_fixup_test4, ftr_fixup_test4_expected, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_case_with_branch(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test5[];
|
|
extern unsigned int end_ftr_fixup_test5[];
|
|
extern unsigned int ftr_fixup_test5_expected[];
|
|
int size = 4 * (end_ftr_fixup_test5 - ftr_fixup_test5);
|
|
|
|
check(memcmp(ftr_fixup_test5, ftr_fixup_test5_expected, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_case_with_external_branch(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test6[];
|
|
extern unsigned int end_ftr_fixup_test6[];
|
|
extern unsigned int ftr_fixup_test6_expected[];
|
|
int size = 4 * (end_ftr_fixup_test6 - ftr_fixup_test6);
|
|
|
|
check(memcmp(ftr_fixup_test6, ftr_fixup_test6_expected, size) == 0);
|
|
}
|
|
|
|
static void test_alternative_case_with_branch_to_end(void)
|
|
{
|
|
extern unsigned int ftr_fixup_test7[];
|
|
extern unsigned int end_ftr_fixup_test7[];
|
|
extern unsigned int ftr_fixup_test7_expected[];
|
|
int size = 4 * (end_ftr_fixup_test7 - ftr_fixup_test7);
|
|
|
|
check(memcmp(ftr_fixup_test7, ftr_fixup_test7_expected, size) == 0);
|
|
}
|
|
|
|
static void test_cpu_macros(void)
|
|
{
|
|
extern u8 ftr_fixup_test_FTR_macros[];
|
|
extern u8 ftr_fixup_test_FTR_macros_expected[];
|
|
unsigned long size = ftr_fixup_test_FTR_macros_expected -
|
|
ftr_fixup_test_FTR_macros;
|
|
|
|
/* The fixups have already been done for us during boot */
|
|
check(memcmp(ftr_fixup_test_FTR_macros,
|
|
ftr_fixup_test_FTR_macros_expected, size) == 0);
|
|
}
|
|
|
|
static void test_fw_macros(void)
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{
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#ifdef CONFIG_PPC64
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extern u8 ftr_fixup_test_FW_FTR_macros[];
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extern u8 ftr_fixup_test_FW_FTR_macros_expected[];
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unsigned long size = ftr_fixup_test_FW_FTR_macros_expected -
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ftr_fixup_test_FW_FTR_macros;
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/* The fixups have already been done for us during boot */
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check(memcmp(ftr_fixup_test_FW_FTR_macros,
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ftr_fixup_test_FW_FTR_macros_expected, size) == 0);
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#endif
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}
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static void test_lwsync_macros(void)
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{
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extern u8 lwsync_fixup_test[];
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extern u8 end_lwsync_fixup_test[];
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extern u8 lwsync_fixup_test_expected_LWSYNC[];
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extern u8 lwsync_fixup_test_expected_SYNC[];
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unsigned long size = end_lwsync_fixup_test -
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lwsync_fixup_test;
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/* The fixups have already been done for us during boot */
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if (cur_cpu_spec->cpu_features & CPU_FTR_LWSYNC) {
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check(memcmp(lwsync_fixup_test,
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lwsync_fixup_test_expected_LWSYNC, size) == 0);
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} else {
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check(memcmp(lwsync_fixup_test,
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lwsync_fixup_test_expected_SYNC, size) == 0);
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}
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}
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#ifdef CONFIG_PPC64
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static void __init test_prefix_patching(void)
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{
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extern unsigned int ftr_fixup_prefix1[];
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extern unsigned int end_ftr_fixup_prefix1[];
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extern unsigned int ftr_fixup_prefix1_orig[];
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extern unsigned int ftr_fixup_prefix1_expected[];
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int size = sizeof(unsigned int) * (end_ftr_fixup_prefix1 - ftr_fixup_prefix1);
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fixup.value = fixup.mask = 8;
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fixup.start_off = calc_offset(&fixup, ftr_fixup_prefix1 + 1);
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fixup.end_off = calc_offset(&fixup, ftr_fixup_prefix1 + 3);
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fixup.alt_start_off = fixup.alt_end_off = 0;
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|
|
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/* Sanity check */
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check(memcmp(ftr_fixup_prefix1, ftr_fixup_prefix1_orig, size) == 0);
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|
|
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patch_feature_section(0, &fixup);
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check(memcmp(ftr_fixup_prefix1, ftr_fixup_prefix1_expected, size) == 0);
|
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check(memcmp(ftr_fixup_prefix1, ftr_fixup_prefix1_orig, size) != 0);
|
|
}
|
|
|
|
static void __init test_prefix_alt_patching(void)
|
|
{
|
|
extern unsigned int ftr_fixup_prefix2[];
|
|
extern unsigned int end_ftr_fixup_prefix2[];
|
|
extern unsigned int ftr_fixup_prefix2_orig[];
|
|
extern unsigned int ftr_fixup_prefix2_expected[];
|
|
extern unsigned int ftr_fixup_prefix2_alt[];
|
|
int size = sizeof(unsigned int) * (end_ftr_fixup_prefix2 - ftr_fixup_prefix2);
|
|
|
|
fixup.value = fixup.mask = 8;
|
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fixup.start_off = calc_offset(&fixup, ftr_fixup_prefix2 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_prefix2 + 3);
|
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fixup.alt_start_off = calc_offset(&fixup, ftr_fixup_prefix2_alt);
|
|
fixup.alt_end_off = calc_offset(&fixup, ftr_fixup_prefix2_alt + 2);
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_prefix2, ftr_fixup_prefix2_orig, size) == 0);
|
|
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_prefix2, ftr_fixup_prefix2_expected, size) == 0);
|
|
check(memcmp(ftr_fixup_prefix2, ftr_fixup_prefix2_orig, size) != 0);
|
|
}
|
|
|
|
static void __init test_prefix_word_alt_patching(void)
|
|
{
|
|
extern unsigned int ftr_fixup_prefix3[];
|
|
extern unsigned int end_ftr_fixup_prefix3[];
|
|
extern unsigned int ftr_fixup_prefix3_orig[];
|
|
extern unsigned int ftr_fixup_prefix3_expected[];
|
|
extern unsigned int ftr_fixup_prefix3_alt[];
|
|
int size = sizeof(unsigned int) * (end_ftr_fixup_prefix3 - ftr_fixup_prefix3);
|
|
|
|
fixup.value = fixup.mask = 8;
|
|
fixup.start_off = calc_offset(&fixup, ftr_fixup_prefix3 + 1);
|
|
fixup.end_off = calc_offset(&fixup, ftr_fixup_prefix3 + 4);
|
|
fixup.alt_start_off = calc_offset(&fixup, ftr_fixup_prefix3_alt);
|
|
fixup.alt_end_off = calc_offset(&fixup, ftr_fixup_prefix3_alt + 3);
|
|
/* Sanity check */
|
|
check(memcmp(ftr_fixup_prefix3, ftr_fixup_prefix3_orig, size) == 0);
|
|
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_prefix3, ftr_fixup_prefix3_expected, size) == 0);
|
|
patch_feature_section(0, &fixup);
|
|
check(memcmp(ftr_fixup_prefix3, ftr_fixup_prefix3_orig, size) != 0);
|
|
}
|
|
#else
|
|
static inline void test_prefix_patching(void) {}
|
|
static inline void test_prefix_alt_patching(void) {}
|
|
static inline void test_prefix_word_alt_patching(void) {}
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
static int __init test_feature_fixups(void)
|
|
{
|
|
printk(KERN_DEBUG "Running feature fixup self-tests ...\n");
|
|
|
|
test_basic_patching();
|
|
test_alternative_patching();
|
|
test_alternative_case_too_big();
|
|
test_alternative_case_too_small();
|
|
test_alternative_case_with_branch();
|
|
test_alternative_case_with_external_branch();
|
|
test_alternative_case_with_branch_to_end();
|
|
test_cpu_macros();
|
|
test_fw_macros();
|
|
test_lwsync_macros();
|
|
test_prefix_patching();
|
|
test_prefix_alt_patching();
|
|
test_prefix_word_alt_patching();
|
|
|
|
return 0;
|
|
}
|
|
late_initcall(test_feature_fixups);
|
|
|
|
#endif /* CONFIG_FTR_FIXUP_SELFTEST */
|