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0ce0bba4e5
Setting pv_irq_ops for Xen PV domains should be done as early as possible in order to support e.g. very early printk() usage. The same applies to xen_vcpu_info_reset(0), as it is needed for the pv irq ops. Move the call of xen_setup_machphys_mapping() after initializing the pv functions as it contains a WARN_ON(), too. Remove the no longer necessary conditional in xen_init_irq_ops() from PVH V1 times to make clear this is a PV only function. Cc: <stable@vger.kernel.org> # 4.14 Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Signed-off-by: Juergen Gross <jgross@suse.com>
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/hardirq.h>
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#include <asm/x86_init.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/sched.h>
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#include <xen/interface/vcpu.h>
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#include <xen/features.h>
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#include <xen/events.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include "xen-ops.h"
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/*
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* Force a proper event-channel callback from Xen after clearing the
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* callback mask. We do this in a very simple manner, by making a call
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* down into Xen. The pending flag will be checked by Xen on return.
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*/
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void xen_force_evtchn_callback(void)
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{
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(void)HYPERVISOR_xen_version(0, NULL);
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}
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asmlinkage __visible unsigned long xen_save_fl(void)
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{
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struct vcpu_info *vcpu;
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unsigned long flags;
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vcpu = this_cpu_read(xen_vcpu);
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/* flag has opposite sense of mask */
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flags = !vcpu->evtchn_upcall_mask;
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/* convert to IF type flag
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-0 -> 0x00000000
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-1 -> 0xffffffff
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*/
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return (-flags) & X86_EFLAGS_IF;
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl);
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__visible void xen_restore_fl(unsigned long flags)
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{
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struct vcpu_info *vcpu;
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/* convert from IF type flag */
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flags = !(flags & X86_EFLAGS_IF);
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/* See xen_irq_enable() for why preemption must be disabled. */
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preempt_disable();
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vcpu = this_cpu_read(xen_vcpu);
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vcpu->evtchn_upcall_mask = flags;
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if (flags == 0) {
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barrier(); /* unmask then check (avoid races) */
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if (unlikely(vcpu->evtchn_upcall_pending))
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xen_force_evtchn_callback();
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preempt_enable();
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} else
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preempt_enable_no_resched();
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl);
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asmlinkage __visible void xen_irq_disable(void)
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{
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/* There's a one instruction preempt window here. We need to
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make sure we're don't switch CPUs between getting the vcpu
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pointer and updating the mask. */
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preempt_disable();
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this_cpu_read(xen_vcpu)->evtchn_upcall_mask = 1;
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preempt_enable_no_resched();
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
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asmlinkage __visible void xen_irq_enable(void)
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{
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struct vcpu_info *vcpu;
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/*
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* We may be preempted as soon as vcpu->evtchn_upcall_mask is
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* cleared, so disable preemption to ensure we check for
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* events on the VCPU we are still running on.
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*/
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preempt_disable();
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vcpu = this_cpu_read(xen_vcpu);
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vcpu->evtchn_upcall_mask = 0;
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/* Doesn't matter if we get preempted here, because any
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pending event will get dealt with anyway. */
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barrier(); /* unmask then check (avoid races) */
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if (unlikely(vcpu->evtchn_upcall_pending))
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xen_force_evtchn_callback();
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preempt_enable();
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}
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PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable);
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static void xen_safe_halt(void)
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{
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/* Blocking includes an implicit local_irq_enable(). */
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if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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BUG();
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}
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static void xen_halt(void)
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{
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if (irqs_disabled())
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HYPERVISOR_vcpu_op(VCPUOP_down,
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xen_vcpu_nr(smp_processor_id()), NULL);
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else
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xen_safe_halt();
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}
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static const struct pv_irq_ops xen_irq_ops __initconst = {
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.save_fl = PV_CALLEE_SAVE(xen_save_fl),
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.restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
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.irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
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.irq_enable = PV_CALLEE_SAVE(xen_irq_enable),
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.safe_halt = xen_safe_halt,
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.halt = xen_halt,
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};
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void __init xen_init_irq_ops(void)
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{
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pv_irq_ops = xen_irq_ops;
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x86_init.irqs.intr_init = xen_init_IRQ;
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}
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